arch/x86/events/zhaoxin/core.c | 1 + 1 file changed, 1 insertion(+)
From: tanze <tanze0x01@163.com>
Perf's instructions event tests on Zhaoxin CPUs may exhibit:
$perf stat -e instructions,cycles ls -l
......
Performance counter stats for 'ls -l':
0 instructions # 0.00 insn per cycle
9,488,278 cycles
0.004365407 seconds time elapsed
0.003303000 seconds user
0.001099000 seconds sys
The absence of the fixedctr member leads to an incorrect hwc->event_base
value on Zhaoxin CPUs, causing a discrepancy in the instruction count
reported by perf stat. This commit resolves the instruction count issue
by properly initializing the fixedctr member.
Fixes: 149fd4712bcd ("perf/x86/intel: Support Perfmon MSRs aliasing")
Signed-off-by: tanze <tanze0x01@163.com>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
---
v1-v3:https://lore.kernel.org/all/20250620023757.1429898-1-tanze@kylinos.cn/
This patch does not modify the previous code,
Do you have any other suggestions?
---
arch/x86/events/zhaoxin/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/events/zhaoxin/core.c b/arch/x86/events/zhaoxin/core.c
index 4bdfcf091200..3fc3f9abece9 100644
--- a/arch/x86/events/zhaoxin/core.c
+++ b/arch/x86/events/zhaoxin/core.c
@@ -467,6 +467,7 @@ static const struct x86_pmu zhaoxin_pmu __initconst = {
.schedule_events = x86_schedule_events,
.eventsel = MSR_ARCH_PERFMON_EVENTSEL0,
.perfctr = MSR_ARCH_PERFMON_PERFCTR0,
+ .fixedctr = MSR_ARCH_PERFMON_FIXED_CTR0,
.event_map = zhaoxin_pmu_event_map,
.max_events = ARRAY_SIZE(zx_pmon_event_map),
.apic = 1,
--
2.25.1
在 2025/8/14 17:33, tanze0x01@163.com 写道: > From: tanze <tanze0x01@163.com> > > Perf's instructions event tests on Zhaoxin CPUs may exhibit: > > $perf stat -e instructions,cycles ls -l > > ...... > Performance counter stats for 'ls -l': > > 0 instructions # 0.00 insn per cycle > 9,488,278 cycles > > 0.004365407 seconds time elapsed > > 0.003303000 seconds user > 0.001099000 seconds sys > > The absence of the fixedctr member leads to an incorrect hwc->event_base > value on Zhaoxin CPUs, causing a discrepancy in the instruction count > reported by perf stat. This commit resolves the instruction count issue > by properly initializing the fixedctr member. > > Fixes: 149fd4712bcd ("perf/x86/intel: Support Perfmon MSRs aliasing") > Signed-off-by: tanze <tanze0x01@163.com> > Reviewed-by: Kan Liang <kan.liang@linux.intel.com> > > --- > v1-v3:https://lore.kernel.org/all/20250620023757.1429898-1-tanze@kylinos.cn/ > > This patch does not modify the previous code, > Do you have any other suggestions? > Hi peterz, This is a friendly ping on this patch. It has been reviewed by Kan Liang a couple of months ago. Is there anything I can do to help get it merged? Thanks,
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