[PATCH v5 0/2] pinctrl: qcom: Introduce Pinctrl for Glymur

Pankaj Patil posted 2 patches 4 months, 1 week ago
There is a newer version of this series
.../bindings/pinctrl/qcom,glymur-tlmm.yaml    |  133 ++
drivers/pinctrl/qcom/Kconfig.msm              |   10 +
drivers/pinctrl/qcom/Makefile                 |    1 +
drivers/pinctrl/qcom/pinctrl-glymur.c         | 1777 +++++++++++++++++
4 files changed, 1921 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,glymur-tlmm.yaml
create mode 100644 drivers/pinctrl/qcom/pinctrl-glymur.c
[PATCH v5 0/2] pinctrl: qcom: Introduce Pinctrl for Glymur
Posted by Pankaj Patil 4 months, 1 week ago
Introduce Top Level Mode Multiplexer dt-binding and driver for
Qualcomm's next gen compute SoC - Glymur.
Device tree changes aren't part of this series and will be posted separately after the official announcement of the Glymur SoC

Changes in v5:
Rebased on top of v6.17-rc1
RESOUT_GPIO_N changed to lowercase in bindings and driver

Changes in v4:
Updated bindings to column length of 80 char

Changes in v3:
Fixed indentation for example tlmm node in bindings file
Fixed s-o-b and review comments in the driver

Changes in v2:
Fixed dt-bindings error from example node's reg propery
Fixed gpio-line-name maxItems
Driver UFS_RESET macro updated
Removed obsolete comment for pingroups
Updated ngpio to include ufs_reset pin

Pankaj Patil (2):
  dt-bindings: pinctrl: qcom: Add Glymur pinctrl bindings
  pinctrl: qcom: Add glymur pinctrl driver

 .../bindings/pinctrl/qcom,glymur-tlmm.yaml    |  133 ++
 drivers/pinctrl/qcom/Kconfig.msm              |   10 +
 drivers/pinctrl/qcom/Makefile                 |    1 +
 drivers/pinctrl/qcom/pinctrl-glymur.c         | 1777 +++++++++++++++++
 4 files changed, 1921 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,glymur-tlmm.yaml
 create mode 100644 drivers/pinctrl/qcom/pinctrl-glymur.c

-- 
2.34.1
Re: [PATCH v5 0/2] pinctrl: qcom: Introduce Pinctrl for Glymur
Posted by Krzysztof Kozlowski 4 months, 1 week ago
On 13/08/2025 08:55, Pankaj Patil wrote:
> Introduce Top Level Mode Multiplexer dt-binding and driver for
> Qualcomm's next gen compute SoC - Glymur.
> Device tree changes aren't part of this series and will be posted separately after the official announcement of the Glymur SoC
> 
> Changes in v5:
> Rebased on top of v6.17-rc1
> RESOUT_GPIO_N changed to lowercase in bindings and driver
> 
> Changes in v4:
> Updated bindings to column length of 80 char
> 
> Changes in v3:
> Fixed indentation for example tlmm node in bindings file
> Fixed s-o-b and review comments in the driver
> 
> Changes in v2:
> Fixed dt-bindings error from example node's reg propery
> Fixed gpio-line-name maxItems
> Driver UFS_RESET macro updated
> Removed obsolete comment for pingroups
> Updated ngpio to include ufs_reset pin

Where are lore links? Why aren't you using b4?

Best regards,
Krzysztof
Re: [PATCH v5 0/2] pinctrl: qcom: Introduce Pinctrl for Glymur
Posted by Pankaj Patil 4 months, 1 week ago
On 8/13/2025 1:01 PM, Krzysztof Kozlowski wrote:
> On 13/08/2025 08:55, Pankaj Patil wrote:
>> Introduce Top Level Mode Multiplexer dt-binding and driver for
>> Qualcomm's next gen compute SoC - Glymur.
>> Device tree changes aren't part of this series and will be posted separately after the official announcement of the Glymur SoC
>>
>> Changes in v5:
>> Rebased on top of v6.17-rc1
>> RESOUT_GPIO_N changed to lowercase in bindings and driver
>>
>> Changes in v4:
>> Updated bindings to column length of 80 char
>>
>> Changes in v3:
>> Fixed indentation for example tlmm node in bindings file
>> Fixed s-o-b and review comments in the driver
>>
>> Changes in v2:
>> Fixed dt-bindings error from example node's reg propery
>> Fixed gpio-line-name maxItems
>> Driver UFS_RESET macro updated
>> Removed obsolete comment for pingroups
>> Updated ngpio to include ufs_reset pin
> Where are lore links? Why aren't you using b4?
>
> Best regards,
> Krzysztof
Here are the lore links for the old series, I'll setup b4 from the next rev.
Do you want me to share another revision with lore links embedded?

v4:
https://lore.kernel.org/all/20250723103644.4058213-1-pankaj.patil@oss.qualcomm.com/

v3:
https://lore.kernel.org/all/20250721163221.310746-1-pankaj.patil@oss.qualcomm.com/

v2:
https://lore.kernel.org/all/20250721143037.20983-1-pankaj.patil@oss.qualcomm.com/

v1:
https://lore.kernel.org/all/20250716150822.4039250-1-pankaj.patil@oss.qualcomm.com/

Thanks,
Pankaj