arm64: dts: renesas: Add support for SCI/LEDs/I2C/MMC on RZ/{T2H,RZ/N2H} SoCs and boards

[PATCH 09/13] arm64: dts: renesas: r9a09g087m44-rzt2h-evk: Enable I2C0 and I2C1 support

Posted by Prabhakar 1 month, 3 weeks ago

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Enable I2C0 and I2C1 on the RZ/N2H evaluation board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 .../dts/renesas/r9a09g087m44-rzn2h-evk.dts    | 56 +++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
index f6437e82a7de..e41b687e5497 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
@@ -12,6 +12,14 @@
 #include "r9a09g087m44.dtsi"
 #include "rzt2h-n2h-evk-common.dtsi"
 
+/*
+ * I2C0 and LED8/9 share the same pins use the below
+ * macro to choose (and set approopriate DIP switches).
+ */
+#define I2C0	1
+#define LED8	(!I2C0)
+#define LED9	(!I2C0)
+
 / {
 	model = "Renesas RZ/N2H EVK Board based on r9a09g087m44";
 	compatible = "renesas,rzn2h-evk", "renesas,r9a09g087m44", "renesas,r9a09g087";
@@ -47,15 +55,19 @@ led7 {
 			gpios = <&pinctrl RZN2H_GPIO(14, 3) GPIO_ACTIVE_LOW>;
 		};
 
+#if LED8
 		led8 {
 			/* DSW15-8: OFF, DSW15-9: OFF, DSW15-10: ON */
 			gpios = <&pinctrl RZN2H_GPIO(14, 6) GPIO_ACTIVE_LOW>;
 		};
+#endif
 
+#if LED9
 		led9 {
 			/* DSW15-5: OFF, DSW16-6: ON */
 			gpios = <&pinctrl RZN2H_GPIO(14, 7) GPIO_ACTIVE_LOW>;
 		};
+#endif
 
 		led10 {
 			/* DSW17-3: OFF, DSW17-4: ON */
@@ -68,3 +80,47 @@ led11 {
 		};
 	};
 };
+
+#if I2C0
+&i2c0 {
+	pinctrl-0 = <&i2c0_pins>;
+	pinctrl-names = "default";
+	clock-frequency = <400000>;
+	status = "okay";
+};
+#endif
+
+&i2c1 {
+	pinctrl-0 = <&i2c1_pins>;
+	pinctrl-names = "default";
+	clock-frequency = <400000>;
+	status = "okay";
+};
+
+&pinctrl {
+	/*
+	 * I2C0 Pin Configuration:
+	 * ------------------------
+	 * Signal | Pin     | DSW15
+	 * -------|---------|--------------
+	 * SCL    | P14_6   | 8: OFF, 9: ON, 10: OFF
+	 * SDA    | P14_7   | 5: ON, 6: OFF
+	 */
+	i2c0_pins: i2c0-pins {
+		pinmux = <RZN2H_PORT_PINMUX(14, 6, 0x17)>,
+			 <RZN2H_PORT_PINMUX(14, 7, 0x17)>;
+	};
+
+	/*
+	 * I2C1 Pin Configuration:
+	 * ------------------------
+	 * Signal | Pin     | DSW7
+	 * -------|---------|--------------
+	 * SCL    | P03_3   | 3: ON, 4: OFF
+	 * SDA    | P03_4   | 1: ON, 2: OFF
+	 */
+	i2c1_pins: i2c1-pins {
+		pinmux = <RZN2H_PORT_PINMUX(3, 3, 0x17)>,
+			 <RZN2H_PORT_PINMUX(3, 4, 0x17)>;
+	};
+};
-- 
2.50.1

Re: [PATCH 09/13] arm64: dts: renesas: r9a09g087m44-rzt2h-evk: Enable I2C0 and I2C1 support

Posted by Geert Uytterhoeven 1 month, 2 weeks ago

Hi Prabhakar,

On Tue, 12 Aug 2025 at 22:03, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Enable I2C0 and I2C1 on the RZ/N2H evaluation board.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
> +++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts

> +       /*
> +        * I2C1 Pin Configuration:
> +        * ------------------------
> +        * Signal | Pin     | DSW7
> +        * -------|---------|--------------
> +        * SCL    | P03_3   | 3: ON, 4: OFF

1: ON, 2: OFF

> +        * SDA    | P03_4   | 1: ON, 2: OFF

3: ON, 4: OFF

> +        */
> +       i2c1_pins: i2c1-pins {
> +               pinmux = <RZN2H_PORT_PINMUX(3, 3, 0x17)>,
> +                        <RZN2H_PORT_PINMUX(3, 4, 0x17)>;
> +       };
> +};

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 09/13] arm64: dts: renesas: r9a09g087m44-rzt2h-evk: Enable I2C0 and I2C1 support

Posted by Lad, Prabhakar 1 month, 2 weeks ago

Hi Geert,

Thank you for the review.

On Mon, Aug 18, 2025 at 3:00 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Tue, 12 Aug 2025 at 22:03, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Enable I2C0 and I2C1 on the RZ/N2H evaluation board.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
> > +++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
>
> > +       /*
> > +        * I2C1 Pin Configuration:
> > +        * ------------------------
> > +        * Signal | Pin     | DSW7
> > +        * -------|---------|--------------
> > +        * SCL    | P03_3   | 3: ON, 4: OFF
>
> 1: ON, 2: OFF
>
> > +        * SDA    | P03_4   | 1: ON, 2: OFF
>
> 3: ON, 4: OFF
>
Agreed, I will fix it in v2.

Cheers,
Prabhakar

> > +        */
> > +       i2c1_pins: i2c1-pins {
> > +               pinmux = <RZN2H_PORT_PINMUX(3, 3, 0x17)>,
> > +                        <RZN2H_PORT_PINMUX(3, 4, 0x17)>;
> > +       };
> > +};
>
> The rest LGTM.
>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds
>