.../bindings/pwm/fsl,vf610-ftm-pwm.yaml | 11 ++++-- drivers/pwm/pwm-fsl-ftm.c | 35 +++++++++++++++++-- 2 files changed, 41 insertions(+), 5 deletions(-)
The NXP Automotive platform s32g2 and s32g3 have on their board a
FlexTimer (FTM) dedicated for the PWM. The same IP is found on the
Freescale Vybrid Family and the i.MX8 SoCs. However, there is a small
difference with some registers not available on the s32g2/3 and 6
channels instead of 8.
These two patches provide the DT bindings for the s32g2/3 compatible
strings and the code to deal with the FTM difference.
Changelog:
v3:
- Fixed dt-bindings subject prefix
v2:
- Merged the two booleans for the regmap holes check
- Clarified why this is needed in the changelog
v1:
- Initial post
Daniel Lezcano (1):
dt-bindings: pwm: fsl,vf610-ftm-pwm: Add compatible for s32g2 and
s32g3
Ghennadi Procopciuc (1):
pwm: Add the S32G support in the Freescale FTM driver
.../bindings/pwm/fsl,vf610-ftm-pwm.yaml | 11 ++++--
drivers/pwm/pwm-fsl-ftm.c | 35 +++++++++++++++++--
2 files changed, 41 insertions(+), 5 deletions(-)
--
2.43.0
Hello Daniel, On Tue, Aug 12, 2025 at 10:00:34PM +0200, Daniel Lezcano wrote: > The NXP Automotive platform s32g2 and s32g3 have on their board a > FlexTimer (FTM) dedicated for the PWM. The same IP is found on the > Freescale Vybrid Family and the i.MX8 SoCs. However, there is a small > difference with some registers not available on the s32g2/3 and 6 > channels instead of 8. > > These two patches provide the DT bindings for the s32g2/3 compatible > strings and the code to deal with the FTM difference. > > Changelog: > v3: > - Fixed dt-bindings subject prefix > v2: > - Merged the two booleans for the regmap holes check > - Clarified why this is needed in the changelog > v1: > - Initial post > > Daniel Lezcano (1): > dt-bindings: pwm: fsl,vf610-ftm-pwm: Add compatible for s32g2 and > s32g3 > > Ghennadi Procopciuc (1): > pwm: Add the S32G support in the Freescale FTM driver Applied to https://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux.git pwm/for-next with this merge conflict resolution: diff --cc drivers/pwm/pwm-fsl-ftm.c index 6683931872fc,e0069dbdb02d..000000000000 --- a/drivers/pwm/pwm-fsl-ftm.c +++ b/drivers/pwm/pwm-fsl-ftm.c @@@ -396,7 -428,9 +416,7 @@@ static int fsl_pwm_probe(struct platfor return PTR_ERR(chip); fpc = to_fsl_chip(chip); - mutex_init(&fpc->lock); - - fpc->soc = of_device_get_match_data(&pdev->dev); + fpc->soc = soc; base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) The pro tip here to make your upstream maintainer lucky is to work on their tree or next or at least the latest development release and make use of `git format-patch --base`. Best regards Uwe
On 14/08/2025 12:54, Uwe Kleine-König wrote: > Hello Daniel, > > On Tue, Aug 12, 2025 at 10:00:34PM +0200, Daniel Lezcano wrote: >> The NXP Automotive platform s32g2 and s32g3 have on their board a >> FlexTimer (FTM) dedicated for the PWM. The same IP is found on the >> Freescale Vybrid Family and the i.MX8 SoCs. However, there is a small >> difference with some registers not available on the s32g2/3 and 6 >> channels instead of 8. >> >> These two patches provide the DT bindings for the s32g2/3 compatible >> strings and the code to deal with the FTM difference. >> >> Changelog: >> v3: >> - Fixed dt-bindings subject prefix >> v2: >> - Merged the two booleans for the regmap holes check >> - Clarified why this is needed in the changelog >> v1: >> - Initial post >> >> Daniel Lezcano (1): >> dt-bindings: pwm: fsl,vf610-ftm-pwm: Add compatible for s32g2 and >> s32g3 >> >> Ghennadi Procopciuc (1): >> pwm: Add the S32G support in the Freescale FTM driver > > Applied to > https://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux.git pwm/for-next > > with this merge conflict resolution: Thanks for fixing the conflict. Restested it and I can confirm it works as expected. > diff --cc drivers/pwm/pwm-fsl-ftm.c > index 6683931872fc,e0069dbdb02d..000000000000 > --- a/drivers/pwm/pwm-fsl-ftm.c > +++ b/drivers/pwm/pwm-fsl-ftm.c > @@@ -396,7 -428,9 +416,7 @@@ static int fsl_pwm_probe(struct platfor > return PTR_ERR(chip); > fpc = to_fsl_chip(chip); > > - mutex_init(&fpc->lock); > - > - fpc->soc = of_device_get_match_data(&pdev->dev); > + fpc->soc = soc; > > base = devm_platform_ioremap_resource(pdev, 0); > if (IS_ERR(base)) > > The pro tip here to make your upstream maintainer lucky is to work on > their tree or next or at least the latest development release and make > use of `git format-patch --base`. Ok noted, thanks -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
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