From: Guoniu Zhou <guoniu.zhou@nxp.com>
The CSI-2 receiver in the i.MX8ULP is almost identical to the
version present in the i.MX8QXP/QM. But have different reset
and clock design, so add a device-specific compatible string
for i.MX8ULP to handle the difference.
Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
---
.../bindings/media/nxp,imx8mq-mipi-csi2.yaml | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
index 3389bab266a9..83fdda2252e5 100644
--- a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
+++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
@@ -20,6 +20,7 @@ properties:
- enum:
- fsl,imx8mq-mipi-csi2
- fsl,imx8qxp-mipi-csi2
+ - fsl,imx8ulp-mipi-csi2
- items:
- const: fsl,imx8qm-mipi-csi2
- const: fsl,imx8qxp-mipi-csi2
@@ -39,12 +40,17 @@ properties:
clock that the RX DPHY receives.
- description: ui is the pixel clock (phy_ref up to 333Mhz).
See the reference manual for details.
+ - description: pclk is the lpav bus clock of i.MX8ULP.
+ See the reference manual for details.
+ minItems: 3
clock-names:
items:
- const: core
- const: esc
- const: ui
+ - const: pclk
+ minItems: 3
power-domains:
maxItems: 1
@@ -137,6 +143,23 @@ allOf:
minItems: 2
resets:
maxItems: 1
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx8ulp-mipi-csi2
+ then:
+ properties:
+ reg:
+ minItems: 2
+ resets:
+ maxItems: 2
+ clocks:
+ minItems: 4
+ clock-names:
+ minItems: 4
else:
properties:
reg:
--
2.34.1On Tue, Aug 12, 2025 at 04:19:21PM +0800, guoniu.zhou@oss.nxp.com wrote: > From: Guoniu Zhou <guoniu.zhou@nxp.com> > > The CSI-2 receiver in the i.MX8ULP is almost identical to the > version present in the i.MX8QXP/QM. But have different reset > and clock design, so add a device-specific compatible string > for i.MX8ULP to handle the difference. Nit: wrap at 75 chars. Keep the same restriction for other compatible string. > > Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com> > --- > .../bindings/media/nxp,imx8mq-mipi-csi2.yaml | 23 +++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml > index 3389bab266a9..83fdda2252e5 100644 > --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml > +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml > @@ -20,6 +20,7 @@ properties: > - enum: > - fsl,imx8mq-mipi-csi2 > - fsl,imx8qxp-mipi-csi2 > + - fsl,imx8ulp-mipi-csi2 > - items: > - const: fsl,imx8qm-mipi-csi2 > - const: fsl,imx8qxp-mipi-csi2 > @@ -39,12 +40,17 @@ properties: > clock that the RX DPHY receives. > - description: ui is the pixel clock (phy_ref up to 333Mhz). > See the reference manual for details. > + - description: pclk is the lpav bus clock of i.MX8ULP. > + See the reference manual for details. > + minItems: 3 > > clock-names: > items: > - const: core > - const: esc > - const: ui > + - const: pclk > + minItems: 3 > > power-domains: > maxItems: 1 > @@ -137,6 +143,23 @@ allOf: > minItems: 2 > resets: > maxItems: 1 > + > + - if: > + properties: > + compatible: > + contains: > + enum: > + - fsl,imx8ulp-mipi-csi2 > + then: > + properties: > + reg: > + minItems: 2 > + resets: > + maxItems: 2 need restrict minItems: also, because top reset: minItems is 1. Frank > + clocks: > + minItems: 4 > + clock-names: > + minItems: 4 > else: > properties: > reg: > -- > 2.34.1 >
On 12/08/2025 10:19, guoniu.zhou@oss.nxp.com wrote: > From: Guoniu Zhou <guoniu.zhou@nxp.com> > > The CSI-2 receiver in the i.MX8ULP is almost identical to the > version present in the i.MX8QXP/QM. But have different reset > and clock design, so add a device-specific compatible string > for i.MX8ULP to handle the difference. > > Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com> > --- > .../bindings/media/nxp,imx8mq-mipi-csi2.yaml | 23 +++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml > index 3389bab266a9..83fdda2252e5 100644 > --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml > +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml > @@ -20,6 +20,7 @@ properties: > - enum: > - fsl,imx8mq-mipi-csi2 > - fsl,imx8qxp-mipi-csi2 > + - fsl,imx8ulp-mipi-csi2 > - items: > - const: fsl,imx8qm-mipi-csi2 > - const: fsl,imx8qxp-mipi-csi2 > @@ -39,12 +40,17 @@ properties: > clock that the RX DPHY receives. > - description: ui is the pixel clock (phy_ref up to 333Mhz). > See the reference manual for details. > + - description: pclk is the lpav bus clock of i.MX8ULP. > + See the reference manual for details. > + minItems: 3 You need to restrict all variants. Or explain why old hardware has now 4 clocks. That explanation is missing. Best regards, Krzysztof
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