On Sun, Aug 10, 2025 at 06:57:25PM -0400, Brian Masney wrote:
> The round_rate() clk ops is deprecated, so migrate this driver from
> round_rate() to determine_rate() using the Coccinelle semantic patch
> on the cover letter of this series. The change to use clamp_t() was
> done manually.
>
> Signed-off-by: Brian Masney <bmasney@redhat.com>
> ---
> drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 16 +++++++---------
> 1 file changed, 7 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> index af2e30f3f842a0157f161172bfe42059cabe6a8a..ec486ff02c9b5156cdf0902d05464cf57dc9605b 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> @@ -444,21 +444,19 @@ static unsigned long dsi_pll_10nm_vco_recalc_rate(struct clk_hw *hw,
> return (unsigned long)vco_rate;
> }
>
> -static long dsi_pll_10nm_clk_round_rate(struct clk_hw *hw,
> - unsigned long rate, unsigned long *parent_rate)
> +static int dsi_pll_10nm_clk_determine_rate(struct clk_hw *hw,
> + struct clk_rate_request *req)
> {
> struct dsi_pll_10nm *pll_10nm = to_pll_10nm(hw);
>
> - if (rate < pll_10nm->phy->cfg->min_pll_rate)
> - return pll_10nm->phy->cfg->min_pll_rate;
> - else if (rate > pll_10nm->phy->cfg->max_pll_rate)
> - return pll_10nm->phy->cfg->max_pll_rate;
> - else
> - return rate;
> + req->rate = clamp_t(unsigned long, req->rate,
> + pll_10nm->phy->cfg->min_pll_rate, pll_10nm->phy->cfg->max_pll_rate);
Nit: I'd prefer if there was an EOL after min_pll_rate, but no need to
resend it just for the sake of it.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> +
> + return 0;
> }
>
> static const struct clk_ops clk_ops_dsi_pll_10nm_vco = {
> - .round_rate = dsi_pll_10nm_clk_round_rate,
> + .determine_rate = dsi_pll_10nm_clk_determine_rate,
> .set_rate = dsi_pll_10nm_vco_set_rate,
> .recalc_rate = dsi_pll_10nm_vco_recalc_rate,
> .prepare = dsi_pll_10nm_vco_prepare,
>
> --
> 2.50.1
>
--
With best wishes
Dmitry