From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
The Renesas USB PHY hardware block needs to have the PWRRDY bit in the
system controller set before applying any other settings. The PWRRDY bit
must be controlled during power-on, power-off, and system suspend/resume
sequences as follows:
- during power-on/resume, it must be set to zero before enabling clocks and
modules
- during power-off/suspend, it must be set to one after disabling clocks
and modules
Add the renesas,sysc-pwrrdy device tree property, which allows the
reset-rzg2l-usbphy-ctrl driver to parse, map, and control the system
controller PWRRDY bit at the appropriate time. Along with it add a new
compatible for the RZ/G3S SoC.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
Changes in v4:
- dropped blank line from compatible section
- s/renesas,sysc-signals/renesas,sysc-pwrrdy/g
- dropped description from renesas,sysc-pwrrdy
- updated description of renesas,sysc-pwrrdy items
- updated patch description
Changes in v3:
- none; this patch is new
.../reset/renesas,rzg2l-usbphy-ctrl.yaml | 40 ++++++++++++++++---
1 file changed, 34 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml
index b0b20af15313..c1d5f3228aa9 100644
--- a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml
+++ b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml
@@ -15,12 +15,14 @@ description:
properties:
compatible:
- items:
- - enum:
- - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five
- - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}
- - renesas,r9a07g054-usbphy-ctrl # RZ/V2L
- - const: renesas,rzg2l-usbphy-ctrl
+ oneOf:
+ - items:
+ - enum:
+ - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five
+ - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}
+ - renesas,r9a07g054-usbphy-ctrl # RZ/V2L
+ - const: renesas,rzg2l-usbphy-ctrl
+ - const: renesas,r9a08g045-usbphy-ctrl # RZ/G3S
reg:
maxItems: 1
@@ -48,6 +50,19 @@ properties:
$ref: /schemas/regulator/regulator.yaml#
unevaluatedProperties: false
+ renesas,sysc-pwrrdy:
+ description: The system controller PWRRDY indicates to the USB PHY if the
+ power supply is ready. PWRRDY needs to be set during power-on
+ before applying any other settings. It also needs to
+ be set before powering off the USB.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - items:
+ - description: System controller phandle required by USB PHY CTRL
+ driver to set PWRRDY
+ - description: Register offset associated with PWRRDY
+ - description: Register bitmask associated with PWRRDY
+
required:
- compatible
- reg
@@ -57,6 +72,19 @@ required:
- '#reset-cells'
- regulator-vbus
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,r9a08g045-usbphy-ctrl
+ then:
+ required:
+ - renesas,sysc-pwrrdy
+ else:
+ properties:
+ renesas,sysc-pwrrdy: false
+
additionalProperties: false
examples:
--
2.43.0
On Fri, Aug 08, 2025 at 09:18:02AM +0300, Claudiu wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > The Renesas USB PHY hardware block needs to have the PWRRDY bit in the > system controller set before applying any other settings. The PWRRDY bit > must be controlled during power-on, power-off, and system suspend/resume > sequences as follows: > - during power-on/resume, it must be set to zero before enabling clocks and > modules > - during power-off/suspend, it must be set to one after disabling clocks > and modules > > Add the renesas,sysc-pwrrdy device tree property, which allows the > reset-rzg2l-usbphy-ctrl driver to parse, map, and control the system > controller PWRRDY bit at the appropriate time. Along with it add a new > compatible for the RZ/G3S SoC. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > --- > > Changes in v4: > - dropped blank line from compatible section > - s/renesas,sysc-signals/renesas,sysc-pwrrdy/g > - dropped description from renesas,sysc-pwrrdy > - updated description of renesas,sysc-pwrrdy items > - updated patch description > > Changes in v3: > - none; this patch is new > > .../reset/renesas,rzg2l-usbphy-ctrl.yaml | 40 ++++++++++++++++--- > 1 file changed, 34 insertions(+), 6 deletions(-) > > diff --git a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml > index b0b20af15313..c1d5f3228aa9 100644 > --- a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml > +++ b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml > @@ -15,12 +15,14 @@ description: > > properties: > compatible: > - items: > - - enum: > - - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five > - - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC} > - - renesas,r9a07g054-usbphy-ctrl # RZ/V2L > - - const: renesas,rzg2l-usbphy-ctrl > + oneOf: > + - items: > + - enum: > + - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five > + - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC} > + - renesas,r9a07g054-usbphy-ctrl # RZ/V2L > + - const: renesas,rzg2l-usbphy-ctrl > + - const: renesas,r9a08g045-usbphy-ctrl # RZ/G3S > > reg: > maxItems: 1 > @@ -48,6 +50,19 @@ properties: > $ref: /schemas/regulator/regulator.yaml# > unevaluatedProperties: false > > + renesas,sysc-pwrrdy: > + description: The system controller PWRRDY indicates to the USB PHY if the > + power supply is ready. PWRRDY needs to be set during power-on > + before applying any other settings. It also needs to > + be set before powering off the USB. Where did this odd formatting come from? If copied from somewhere else, patches reformatting them welcome. description: The system controller PWRRDY indicates to the USB PHY if the power supply is ready. PWRRDY needs to be set during power-on before applying any other settings. It also needs to be set before powering off the USB. > + $ref: /schemas/types.yaml#/definitions/phandle-array > + items: > + - items: > + - description: System controller phandle required by USB PHY CTRL > + driver to set PWRRDY Indent by 2 more than 'description' With that, Reviewed-by: Rob Herring (Arm) <robh@kernel.org> > + - description: Register offset associated with PWRRDY > + - description: Register bitmask associated with PWRRDY > + > required: > - compatible > - reg > @@ -57,6 +72,19 @@ required: > - '#reset-cells' > - regulator-vbus > > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: renesas,r9a08g045-usbphy-ctrl > + then: > + required: > + - renesas,sysc-pwrrdy > + else: > + properties: > + renesas,sysc-pwrrdy: false > + > additionalProperties: false > > examples: > -- > 2.43.0 >
Hi, Rob, On 8/14/25 02:21, Rob Herring wrote: > On Fri, Aug 08, 2025 at 09:18:02AM +0300, Claudiu wrote: >> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> >> >> The Renesas USB PHY hardware block needs to have the PWRRDY bit in the >> system controller set before applying any other settings. The PWRRDY bit >> must be controlled during power-on, power-off, and system suspend/resume >> sequences as follows: >> - during power-on/resume, it must be set to zero before enabling clocks and >> modules >> - during power-off/suspend, it must be set to one after disabling clocks >> and modules >> >> Add the renesas,sysc-pwrrdy device tree property, which allows the >> reset-rzg2l-usbphy-ctrl driver to parse, map, and control the system >> controller PWRRDY bit at the appropriate time. Along with it add a new >> compatible for the RZ/G3S SoC. >> >> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> >> --- >> >> Changes in v4: >> - dropped blank line from compatible section >> - s/renesas,sysc-signals/renesas,sysc-pwrrdy/g >> - dropped description from renesas,sysc-pwrrdy >> - updated description of renesas,sysc-pwrrdy items >> - updated patch description >> >> Changes in v3: >> - none; this patch is new >> >> .../reset/renesas,rzg2l-usbphy-ctrl.yaml | 40 ++++++++++++++++--- >> 1 file changed, 34 insertions(+), 6 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml >> index b0b20af15313..c1d5f3228aa9 100644 >> --- a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml >> +++ b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml >> @@ -15,12 +15,14 @@ description: >> >> properties: >> compatible: >> - items: >> - - enum: >> - - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five >> - - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC} >> - - renesas,r9a07g054-usbphy-ctrl # RZ/V2L >> - - const: renesas,rzg2l-usbphy-ctrl >> + oneOf: >> + - items: >> + - enum: >> + - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five >> + - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC} >> + - renesas,r9a07g054-usbphy-ctrl # RZ/V2L >> + - const: renesas,rzg2l-usbphy-ctrl >> + - const: renesas,r9a08g045-usbphy-ctrl # RZ/G3S >> >> reg: >> maxItems: 1 >> @@ -48,6 +50,19 @@ properties: >> $ref: /schemas/regulator/regulator.yaml# >> unevaluatedProperties: false >> >> + renesas,sysc-pwrrdy: >> + description: The system controller PWRRDY indicates to the USB PHY if the >> + power supply is ready. PWRRDY needs to be set during power-on >> + before applying any other settings. It also needs to >> + be set before powering off the USB. > > Where did this odd formatting come from? I formatted it like this by mistake. > If copied from somewhere else, > patches reformatting them welcome. > > description: > The system controller PWRRDY indicates to the USB PHY if the power > supply is ready. PWRRDY needs to be set during power-on before applying > any other settings. It also needs to be set before powering off the USB. OK > > >> + $ref: /schemas/types.yaml#/definitions/phandle-array >> + items: >> + - items: >> + - description: System controller phandle required by USB PHY CTRL >> + driver to set PWRRDY > > Indent by 2 more than 'description' OK Thank you, Claudiu > > With that, > > Reviewed-by: Rob Herring (Arm) <robh@kernel.org> > >> + - description: Register offset associated with PWRRDY >> + - description: Register bitmask associated with PWRRDY >> + >> required: >> - compatible >> - reg >> @@ -57,6 +72,19 @@ required: >> - '#reset-cells' >> - regulator-vbus >> >> +allOf: >> + - if: >> + properties: >> + compatible: >> + contains: >> + const: renesas,r9a08g045-usbphy-ctrl >> + then: >> + required: >> + - renesas,sysc-pwrrdy >> + else: >> + properties: >> + renesas,sysc-pwrrdy: false >> + >> additionalProperties: false >> >> examples: >> -- >> 2.43.0 >>
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