Make schbench work for riscv64

[PATCH] Make schbench work for riscv64

zhou.lu1@zte.com.cn posted 1 patch 1 month, 4 weeks ago

Download mbox

schbench.c | 2 ++
1 file changed, 2 insertions(+)

Expand all Fold all

[PATCH] Make schbench work for riscv64

Posted by zhou.lu1@zte.com.cn 1 month, 4 weeks ago

From: zhoulu <zhou.lu1@zte.com.cn>
Add nop macro for riscv64

Signed-off-by: zhoulu <zhou.lu1@zte.com.cn>
---
schbench.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/schbench.c b/schbench.c
index acdb172..c8f9e56 100644
--- a/schbench.c
+++ b/schbench.c
@@ -1134,6 +1134,8 @@ unsigned long long read_sched_delay(pid_t tid)
#define nop __asm__ __volatile__("yield" ::: "memory")
#elif defined(__powerpc64__)
#define nop __asm__ __volatile__("nop": : :"memory")
+#elif defined(__riscv)
+#define nop __asm__ __volatile__("nop": : :"memory")
#else
#error Unsupported architecture
#endif
--
2.27.0