Add display controller and LDB support in imx943.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
---
arch/arm64/boot/dts/freescale/imx943.dtsi | 55 ++++++++++++++++++++++-
1 file changed, 54 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx943.dtsi b/arch/arm64/boot/dts/freescale/imx943.dtsi
index 657c81b6016f2..70dec03c5608e 100644
--- a/arch/arm64/boot/dts/freescale/imx943.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx943.dtsi
@@ -148,7 +148,7 @@ l3_cache: l3-cache {
};
};
- clock-ldb-pll-div7 {
+ clock_ldb_pll_div7: clock-ldb-pll-div7 {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clocks = <&scmi_clk IMX94_CLK_LDBPLL>;
@@ -174,9 +174,62 @@ dispmix_csr: syscon@4b010000 {
lvds_csr: syscon@4b0c0000 {
compatible = "nxp,imx94-lvds-csr", "syscon";
reg = <0x0 0x4b0c0000 0x0 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
clocks = <&scmi_clk IMX94_CLK_DISPAPB>;
#clock-cells = <1>;
power-domains = <&scmi_devpd IMX94_PD_DISPLAY>;
+
+ ldb: ldb@4 {
+ compatible = "fsl,imx94-ldb";
+ reg = <0x4 0x4>, <0x8 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg-names = "ldb", "lvds";
+ clocks = <&lvds_csr IMX94_CLK_DISPMIX_LVDS_CLK_GATE>;
+ clock-names = "ldb";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ lvds_in: endpoint {
+ remote-endpoint = <&dcif_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+ };
+ };
+ };
+
+ dcif: display-controller@4b120000 {
+ compatible = "nxp,imx94-dcif";
+ reg = <0x0 0x4b120000 0x0 0x300000>;
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "common", "bg_layer", "fg_layer";
+ clocks = <&scmi_clk IMX94_CLK_DISPAPB>,
+ <&scmi_clk IMX94_CLK_DISPAXI>,
+ <&dispmix_csr IMX94_CLK_DISPMIX_CLK_SEL>;
+ clock-names = "apb", "axi", "pix";
+ assigned-clocks = <&dispmix_csr IMX94_CLK_DISPMIX_CLK_SEL>;
+ assigned-clock-parents = <&clock_ldb_pll_div7>;
+ power-domains = <&scmi_devpd IMX94_PD_DISPLAY>;
+ status = "disabled";
+
+ port {
+ dcif_out: endpoint {
+ remote-endpoint = <&lvds_in>;
+ };
+ };
};
};
};
--
2.49.0
On Wed, Aug 06, 2025 at 06:05:14PM +0300, Laurentiu Palcu wrote: > Add display controller and LDB support in imx943. > > Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com> > --- > arch/arm64/boot/dts/freescale/imx943.dtsi | 55 ++++++++++++++++++++++- > 1 file changed, 54 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx943.dtsi b/arch/arm64/boot/dts/freescale/imx943.dtsi > index 657c81b6016f2..70dec03c5608e 100644 > --- a/arch/arm64/boot/dts/freescale/imx943.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx943.dtsi > @@ -148,7 +148,7 @@ l3_cache: l3-cache { > }; > }; > > - clock-ldb-pll-div7 { > + clock_ldb_pll_div7: clock-ldb-pll-div7 { > compatible = "fixed-factor-clock"; > #clock-cells = <0>; > clocks = <&scmi_clk IMX94_CLK_LDBPLL>; > @@ -174,9 +174,62 @@ dispmix_csr: syscon@4b010000 { > lvds_csr: syscon@4b0c0000 { > compatible = "nxp,imx94-lvds-csr", "syscon"; > reg = <0x0 0x4b0c0000 0x0 0x10000>; > + #address-cells = <1>; > + #size-cells = <1>; > clocks = <&scmi_clk IMX94_CLK_DISPAPB>; > #clock-cells = <1>; > power-domains = <&scmi_devpd IMX94_PD_DISPLAY>; > + > + ldb: ldb@4 { > + compatible = "fsl,imx94-ldb"; > + reg = <0x4 0x4>, <0x8 0x4>; > + #address-cells = <1>; > + #size-cells = <0>; Why? There are no children with addressing. You never tested it because this would easily be flagged by tools. > + reg-names = "ldb", "lvds"; Follow DTS coding style. Best regards, Krzysztof
On Thu, Aug 07, 2025 at 09:31:46AM +0200, Krzysztof Kozlowski wrote: > On Wed, Aug 06, 2025 at 06:05:14PM +0300, Laurentiu Palcu wrote: > > Add display controller and LDB support in imx943. > > > > Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com> > > --- > > arch/arm64/boot/dts/freescale/imx943.dtsi | 55 ++++++++++++++++++++++- > > 1 file changed, 54 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx943.dtsi b/arch/arm64/boot/dts/freescale/imx943.dtsi > > index 657c81b6016f2..70dec03c5608e 100644 > > --- a/arch/arm64/boot/dts/freescale/imx943.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx943.dtsi > > @@ -148,7 +148,7 @@ l3_cache: l3-cache { > > }; > > }; > > > > - clock-ldb-pll-div7 { > > + clock_ldb_pll_div7: clock-ldb-pll-div7 { > > compatible = "fixed-factor-clock"; > > #clock-cells = <0>; > > clocks = <&scmi_clk IMX94_CLK_LDBPLL>; > > @@ -174,9 +174,62 @@ dispmix_csr: syscon@4b010000 { > > lvds_csr: syscon@4b0c0000 { > > compatible = "nxp,imx94-lvds-csr", "syscon"; > > reg = <0x0 0x4b0c0000 0x0 0x10000>; > > + #address-cells = <1>; > > + #size-cells = <1>; > > clocks = <&scmi_clk IMX94_CLK_DISPAPB>; > > #clock-cells = <1>; > > power-domains = <&scmi_devpd IMX94_PD_DISPLAY>; > > + > > + ldb: ldb@4 { > > + compatible = "fsl,imx94-ldb"; > > + reg = <0x4 0x4>, <0x8 0x4>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > Why? There are no children with addressing. You never tested it because > this would easily be flagged by tools. I tested it but I realized I only checked the DTB against the nxp,imx94-dcif.yaml schema... :/ After adding the fsl,ldb.yaml, the error popped up. Thanks for the heads-up. > > > + reg-names = "ldb", "lvds"; > > Follow DTS coding style. If this is about 'reg-names' not being immediately after 'reg', then this will be fixed since 'address-cells' and 'size-cells' will be removed. Or is it something else? Thanks, Laurentiu > > Best regards, > Krzysztof >
On Wed, Aug 06, 2025 at 06:05:14PM +0300, Laurentiu Palcu wrote: > Add display controller and LDB support in imx943. > > Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com> > --- Reviewed-by: Frank Li <Frank.Li@nxp.com> > arch/arm64/boot/dts/freescale/imx943.dtsi | 55 ++++++++++++++++++++++- > 1 file changed, 54 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx943.dtsi b/arch/arm64/boot/dts/freescale/imx943.dtsi > index 657c81b6016f2..70dec03c5608e 100644 > --- a/arch/arm64/boot/dts/freescale/imx943.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx943.dtsi > @@ -148,7 +148,7 @@ l3_cache: l3-cache { > }; > }; > > - clock-ldb-pll-div7 { > + clock_ldb_pll_div7: clock-ldb-pll-div7 { > compatible = "fixed-factor-clock"; > #clock-cells = <0>; > clocks = <&scmi_clk IMX94_CLK_LDBPLL>; > @@ -174,9 +174,62 @@ dispmix_csr: syscon@4b010000 { > lvds_csr: syscon@4b0c0000 { > compatible = "nxp,imx94-lvds-csr", "syscon"; > reg = <0x0 0x4b0c0000 0x0 0x10000>; > + #address-cells = <1>; > + #size-cells = <1>; > clocks = <&scmi_clk IMX94_CLK_DISPAPB>; > #clock-cells = <1>; > power-domains = <&scmi_devpd IMX94_PD_DISPLAY>; > + > + ldb: ldb@4 { > + compatible = "fsl,imx94-ldb"; > + reg = <0x4 0x4>, <0x8 0x4>; > + #address-cells = <1>; > + #size-cells = <0>; > + reg-names = "ldb", "lvds"; > + clocks = <&lvds_csr IMX94_CLK_DISPMIX_LVDS_CLK_GATE>; > + clock-names = "ldb"; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + lvds_in: endpoint { > + remote-endpoint = <&dcif_out>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + }; > + }; > + }; > + }; > + > + dcif: display-controller@4b120000 { > + compatible = "nxp,imx94-dcif"; > + reg = <0x0 0x4b120000 0x0 0x300000>; > + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "common", "bg_layer", "fg_layer"; > + clocks = <&scmi_clk IMX94_CLK_DISPAPB>, > + <&scmi_clk IMX94_CLK_DISPAXI>, > + <&dispmix_csr IMX94_CLK_DISPMIX_CLK_SEL>; > + clock-names = "apb", "axi", "pix"; > + assigned-clocks = <&dispmix_csr IMX94_CLK_DISPMIX_CLK_SEL>; > + assigned-clock-parents = <&clock_ldb_pll_div7>; > + power-domains = <&scmi_devpd IMX94_PD_DISPLAY>; > + status = "disabled"; > + > + port { > + dcif_out: endpoint { > + remote-endpoint = <&lvds_in>; > + }; > + }; > }; > }; > }; > -- > 2.49.0 >
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