Add device tree bindings for Marvell PXA1908's power domains.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
.../power/marvell,pxa1908-power-controller.yaml | 105 +++++++++++++++++++++
include/dt-bindings/power/marvell,pxa1908-power.h | 17 ++++
2 files changed, 122 insertions(+)
diff --git a/Documentation/devicetree/bindings/power/marvell,pxa1908-power-controller.yaml b/Documentation/devicetree/bindings/power/marvell,pxa1908-power-controller.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..1cf3a45d56cbb7b75f7204d656016a9a569da186
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/marvell,pxa1908-power-controller.yaml
@@ -0,0 +1,105 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/marvell,pxa1908-power-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Marvell PXA1908 Power Domain Controller
+
+maintainers:
+ - Duje Mihanović <duje@dujemihanovic.xyz>
+
+description: |
+ The Marvell PXA1908 SoC includes multiple power domains which can be powered
+ on/off to save power when different IP cores are not in use.
+
+properties:
+ $nodename:
+ pattern: '^power-controller$'
+
+ compatible:
+ const: marvell,pxa1908-power-controller
+
+ '#power-domain-cells':
+ const: 1
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+patternProperties:
+ "^power-domain@[0-9a-f]+$":
+ type: object
+
+ description: |
+ Represents a power domain within the power controller node as documented
+ in Documentation/devicetree/bindings/power/power-domain.yaml.
+
+ properties:
+ reg:
+ description: |
+ Power domain index. Valid values are defined in:
+ "include/dt-bindings/power/marvell,pxa1908-power.h"
+ maxItems: 1
+
+ clocks:
+ description: |
+ A number of phandles to clocks that need to be enabled during domain
+ power up.
+
+ '#power-domain-cells':
+ const: 0
+
+ required:
+ - reg
+
+ unevaluatedProperties: false
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/power/marvell,pxa1908-power.h>
+
+ clock-controller@d4282800 {
+ compatible = "marvell,pxa1908-apmu", "simple-mfd", "syscon";
+ reg = <0xd4282800 0x400>;
+ #clock-cells = <1>;
+
+ power-controller {
+ compatible = "marvell,pxa1908-power-controller";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #power-domain-cells = <1>;
+
+ power-domain@PXA1908_POWER_DOMAIN_VPU {
+ reg = <PXA1908_POWER_DOMAIN_VPU>;
+ #power-domain-cells = <0>;
+ };
+
+ power-domain@PXA1908_POWER_DOMAIN_GPU {
+ reg = <PXA1908_POWER_DOMAIN_GPU>;
+ #power-domain-cells = <0>;
+ };
+
+ power-domain@PXA1908_POWER_DOMAIN_GPU2D {
+ reg = <PXA1908_POWER_DOMAIN_GPU2D>;
+ #power-domain-cells = <0>;
+ };
+
+ power-domain@PXA1908_POWER_DOMAIN_DSI {
+ reg = <PXA1908_POWER_DOMAIN_DSI>;
+ #power-domain-cells = <0>;
+ };
+
+ power-domain@PXA1908_POWER_DOMAIN_ISP {
+ reg = <PXA1908_POWER_DOMAIN_ISP>;
+ #power-domain-cells = <0>;
+ };
+ };
+ };
diff --git a/include/dt-bindings/power/marvell,pxa1908-power.h b/include/dt-bindings/power/marvell,pxa1908-power.h
new file mode 100644
index 0000000000000000000000000000000000000000..19b088351af138823505a774ff27203429fe2d97
--- /dev/null
+++ b/include/dt-bindings/power/marvell,pxa1908-power.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * Marvell PXA1908 power domains
+ *
+ * Copyright 2025, Duje Mihanović <duje@dujemihanovic.xyz>
+ */
+
+#ifndef __DTS_MARVELL_PXA1908_POWER_H
+#define __DTS_MARVELL_PXA1908_POWER_H
+
+#define PXA1908_POWER_DOMAIN_VPU 0
+#define PXA1908_POWER_DOMAIN_GPU 1
+#define PXA1908_POWER_DOMAIN_GPU2D 2
+#define PXA1908_POWER_DOMAIN_DSI 3
+#define PXA1908_POWER_DOMAIN_ISP 4
+
+#endif
--
2.50.1
On Wed, Aug 06, 2025 at 07:33:21PM +0200, Duje Mihanović wrote:
> Add device tree bindings for Marvell PXA1908's power domains.
>
> Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
> ---
> .../power/marvell,pxa1908-power-controller.yaml | 105 +++++++++++++++++++++
> include/dt-bindings/power/marvell,pxa1908-power.h | 17 ++++
> 2 files changed, 122 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/power/marvell,pxa1908-power-controller.yaml b/Documentation/devicetree/bindings/power/marvell,pxa1908-power-controller.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..1cf3a45d56cbb7b75f7204d656016a9a569da186
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/marvell,pxa1908-power-controller.yaml
> @@ -0,0 +1,105 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/marvell,pxa1908-power-controller.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Marvell PXA1908 Power Domain Controller
> +
> +maintainers:
> + - Duje Mihanović <duje@dujemihanovic.xyz>
> +
> +description: |
> + The Marvell PXA1908 SoC includes multiple power domains which can be powered
> + on/off to save power when different IP cores are not in use.
> +
> +properties:
> + $nodename:
> + pattern: '^power-controller$'
> +
> + compatible:
> + const: marvell,pxa1908-power-controller
> +
> + '#power-domain-cells':
> + const: 1
So this is power domain controller?
> +
> + '#address-cells':
> + const: 1
> +
> + '#size-cells':
> + const: 0
> +
> +patternProperties:
> + "^power-domain@[0-9a-f]+$":
> + type: object
And this is as well?
You duplicated them.
> +
> + description: |
> + Represents a power domain within the power controller node as documented
> + in Documentation/devicetree/bindings/power/power-domain.yaml.
We do not represent individual power domains, just like we do not
represent individual clocks.
> +
> + properties:
> + reg:
> + description: |
> + Power domain index. Valid values are defined in:
> + "include/dt-bindings/power/marvell,pxa1908-power.h"
> + maxItems: 1
So no address space, thus this is not a separate device node.
> +
> + clocks:
> + description: |
Drop everywhere |
> + A number of phandles to clocks that need to be enabled during domain
> + power up.
This does not exist in your example, so it is just confusing.
> +
> + '#power-domain-cells':
> + const: 0
> +
> + required:
> + - reg
> +
> + unevaluatedProperties: false
> +
> +required:
> + - compatible
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/power/marvell,pxa1908-power.h>
> +
> + clock-controller@d4282800 {
> + compatible = "marvell,pxa1908-apmu", "simple-mfd", "syscon";
> + reg = <0xd4282800 0x400>;
> + #clock-cells = <1>;
> +
> + power-controller {
> + compatible = "marvell,pxa1908-power-controller";
No address space, so this should be folded into the parent.
Best regards,
Krzysztof
On Friday, 8 August 2025 09:34:54 Central European Summer Time Krzysztof Kozlowski wrote:
> On Wed, Aug 06, 2025 at 07:33:21PM +0200, Duje Mihanović wrote:
> > + A number of phandles to clocks that need to be enabled during
> > domain + power up.
>
> This does not exist in your example, so it is just confusing.
This is because I have not implemented any of the clocks used by the
domains at this moment.
Actually, I am not sure anymore whether it is necessary to assign
clocks to the domains as I have just yesterday successfully brought up
the GPU with some out-of-tree code and that did not require giving the
domains any clocks even though the vendor kernel does this. Should I
just go with that and drop all clock handling from the power domain
driver, at which point there would be no need for the individual domain
nodes? If not, how should I in the future assign clocks to the domains?
> > +examples:
> > + - |
> > + #include <dt-bindings/power/marvell,pxa1908-power.h>
> > +
> > + clock-controller@d4282800 {
> > + compatible = "marvell,pxa1908-apmu", "simple-mfd", "syscon";
> > + reg = <0xd4282800 0x400>;
> > + #clock-cells = <1>;
> > +
> > + power-controller {
> > + compatible = "marvell,pxa1908-power-controller";
>
> No address space, so this should be folded into the parent.
By this, do you mean that the clock driver registers the power domain
controller through devm_mfd_add_devices()?
Regards,
--
Duje
On 08/08/2025 21:46, Duje Mihanović wrote:
> On Friday, 8 August 2025 09:34:54 Central European Summer Time Krzysztof Kozlowski wrote:
>> On Wed, Aug 06, 2025 at 07:33:21PM +0200, Duje Mihanović wrote:
>>> + A number of phandles to clocks that need to be enabled during
>>> domain + power up.
>>
>> This does not exist in your example, so it is just confusing.
>
> This is because I have not implemented any of the clocks used by the
> domains at this moment.
>
> Actually, I am not sure anymore whether it is necessary to assign
> clocks to the domains as I have just yesterday successfully brought up
> the GPU with some out-of-tree code and that did not require giving the
> domains any clocks even though the vendor kernel does this. Should I
> just go with that and drop all clock handling from the power domain
> driver, at which point there would be no need for the individual domain
> nodes? If not, how should I in the future assign clocks to the domains?
I am asking to see complete binding with complete DTS in example and
submitted to SoC maintainer.
I did not comment on drivers. This is not a driver patch.
>
>>> +examples:
>>> + - |
>>> + #include <dt-bindings/power/marvell,pxa1908-power.h>
>>> +
>>> + clock-controller@d4282800 {
>>> + compatible = "marvell,pxa1908-apmu", "simple-mfd", "syscon";
>>> + reg = <0xd4282800 0x400>;
>>> + #clock-cells = <1>;
>>> +
>>> + power-controller {
>>> + compatible = "marvell,pxa1908-power-controller";
>>
>> No address space, so this should be folded into the parent.
>
> By this, do you mean that the clock driver registers the power domain
> controller through devm_mfd_add_devices()?
There are multiple ways this is being solved but NONE of them are
binding ways. You again bring driver into bindings discussion.
Best regards,
Krzysztof
On Monday, 11 August 2025 08:38:15 Central European Summer Time Krzysztof Kozlowski wrote: > On 08/08/2025 21:46, Duje Mihanović wrote: > > On Friday, 8 August 2025 09:34:54 Central European Summer Time Krzysztof > > Kozlowski wrote: > >> On Wed, Aug 06, 2025 at 07:33:21PM +0200, Duje Mihanović wrote: > >>> + A number of phandles to clocks that need to be enabled during > >>> domain + power up. > >> > >> This does not exist in your example, so it is just confusing. > > > > This is because I have not implemented any of the clocks used by the > > domains at this moment. > > > > Actually, I am not sure anymore whether it is necessary to assign > > clocks to the domains as I have just yesterday successfully brought up > > the GPU with some out-of-tree code and that did not require giving the > > domains any clocks even though the vendor kernel does this. Should I > > just go with that and drop all clock handling from the power domain > > driver, at which point there would be no need for the individual domain > > nodes? If not, how should I in the future assign clocks to the domains? > > I am asking to see complete binding with complete DTS in example and > submitted to SoC maintainer. Hm, so if in the example (and the actual DTS) each domain is assigned a clock, can I then keep the domain and domain controller nodes like Mediatek and Rockchip have? Does SoC maintainer here mean the SoC mailing list or the maintainer of the particular SoC family in question? Regards, -- Duje
On 15/08/2025 00:08, Duje Mihanović wrote: > On Monday, 11 August 2025 08:38:15 Central European Summer Time > Krzysztof Kozlowski wrote: >> On 08/08/2025 21:46, Duje Mihanović wrote: >>> On Friday, 8 August 2025 09:34:54 Central European Summer Time Krzysztof >>> Kozlowski wrote: >>>> On Wed, Aug 06, 2025 at 07:33:21PM +0200, Duje Mihanović wrote: >>>>> + A number of phandles to clocks that need to be enabled during >>>>> domain + power up. >>>> >>>> This does not exist in your example, so it is just confusing. >>> >>> This is because I have not implemented any of the clocks used by the >>> domains at this moment. >>> >>> Actually, I am not sure anymore whether it is necessary to assign >>> clocks to the domains as I have just yesterday successfully brought up >>> the GPU with some out-of-tree code and that did not require giving the >>> domains any clocks even though the vendor kernel does this. Should I >>> just go with that and drop all clock handling from the power domain >>> driver, at which point there would be no need for the individual domain >>> nodes? If not, how should I in the future assign clocks to the domains? >> >> I am asking to see complete binding with complete DTS in example and >> submitted to SoC maintainer. > > Hm, so if in the example (and the actual DTS) each domain is assigned a clock, > can I then keep the domain and domain controller nodes like Mediatek and > Rockchip have? You would need to point me to specific files or show some code. > > Does SoC maintainer here mean the SoC mailing list or the maintainer of the > particular SoC family in question? I meant rather post complete DTS to mailing lists (so maintainer of given SoC family can see it as well), does not have to be the same patchset. Best regards, Krzysztof
On Friday, 15 August 2025 08:08:24 Central European Summer Time Krzysztof Kozlowski wrote: > On 15/08/2025 00:08, Duje Mihanović wrote: > > > I am asking to see complete binding with complete DTS in example and > > > submitted to SoC maintainer. > > > > Hm, so if in the example (and the actual DTS) each domain is assigned a > > clock, can I then keep the domain and domain controller nodes like Mediatek > > and Rockchip have? > > You would need to point me to specific files or show some code. Sure, mediatek,power-controller.yaml and rockchip,power-controller.yaml in Documentation/devicetree/bindings/power. Regards, -- Duje
On 16/08/2025 17:13, Duje Mihanović wrote: > On Friday, 15 August 2025 08:08:24 Central European Summer Time Krzysztof Kozlowski wrote: >> On 15/08/2025 00:08, Duje Mihanović wrote: >>>> I am asking to see complete binding with complete DTS in example and >>>> submitted to SoC maintainer. >>> >>> Hm, so if in the example (and the actual DTS) each domain is assigned a >>> clock, can I then keep the domain and domain controller nodes like Mediatek >>> and Rockchip have? >> >> You would need to point me to specific files or show some code. > > Sure, mediatek,power-controller.yaml and rockchip,power-controller.yaml > in Documentation/devicetree/bindings/power. I see, but your DTS is nothing like that. Best regards, Krzysztof
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