The Atmel SPI controller supports both the peripheral clock and the
Generic Clock (GCLK) as sources for SPCK generation. On platforms like
the SAM9X7 SoC, the peripheral clock can reach frequencies up to
266 MHz, which may exceed the maximum value supported by the Serial
Clock Baud Rate (SCBR) divider, leading to SPI transfer failures. In such
cases, the GCLK can be used as an alternative source for SPCK generation"

This patch updates the Atmel SPI DT binding to support an optional
programmable SPI generic clock, specified as 'spi_gclk', in addition to
the required 'spi_clk'.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
---
 .../devicetree/bindings/spi/atmel,at91rm9200-spi.yaml | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
index d29772994cf5..11885d0cc209 100644
--- a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
+++ b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
@@ -31,11 +31,16 @@ properties:
     maxItems: 1
 
   clock-names:
-    contains:
-      const: spi_clk
+    items:
+      - const: spi_clk
+      - const: spi_gclk
+    minItems: 1
 
   clocks:
-    maxItems: 1
+    items:
+      - description: Peripheral Bus clock
+      - description: Programmable Generic clock
+    minItems: 1
 
   dmas:
     items:
-- 
2.25.1

On Tue, Aug 05, 2025 at 03:55:09PM +0530, Manikandan Muralidharan wrote:
> The Atmel SPI controller supports both the peripheral clock and the
> Generic Clock (GCLK) as sources for SPCK generation. On platforms like
> the SAM9X7 SoC, the peripheral clock can reach frequencies up to
> 266 MHz, which may exceed the maximum value supported by the Serial
> Clock Baud Rate (SCBR) divider, leading to SPI transfer failures. In such
> cases, the GCLK can be used as an alternative source for SPCK generation"
> 
> This patch updates the Atmel SPI DT binding to support an optional
> programmable SPI generic clock, specified as 'spi_gclk', in addition to
> the required 'spi_clk'.
> 
> Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
> ---
>  .../devicetree/bindings/spi/atmel,at91rm9200-spi.yaml | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
> index d29772994cf5..11885d0cc209 100644
> --- a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
> +++ b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
> @@ -31,11 +31,16 @@ properties:
>      maxItems: 1
>  
>    clock-names:
> -    contains:
> -      const: spi_clk
> +    items:
> +      - const: spi_clk
> +      - const: spi_gclk

Well, "spi_clk" was a terrible name as it is completely redundant as 
this is the "spi" block and everything in the list is a "clk". So don't 
continue it and just do "gclk".

> +    minItems: 1
>  
>    clocks:
> -    maxItems: 1
> +    items:
> +      - description: Peripheral Bus clock
> +      - description: Programmable Generic clock
> +    minItems: 1
>  
>    dmas:
>      items:
> -- 
> 2.25.1
>