Add USB clock support for R9A09G077 and R9A09G087 SoCs

[PATCH 1/2] dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID

Posted by Prabhakar 2 months ago

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add USB clock (USB_CLK) definition for the Renesas RZ/T2H (R9A09G077)
and RZ/N2H (R9A09G087) SoCs. USB_CLK is used as the reference clock for
USB PHY layer.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h | 1 +
 include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
index 7ecc4f0b235a..0c2ce81a8744 100644
--- a/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
+++ b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
@@ -25,5 +25,6 @@
 #define R9A09G077_CLK_PCLKM		13
 #define R9A09G077_CLK_PCLKL		14
 #define R9A09G077_SDHI_CLKHS		15
+#define R9A09G077_USB_CLK		16
 
 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G077_CPG_H__ */
diff --git a/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h b/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h
index 925e57703925..70ee883f2386 100644
--- a/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h
+++ b/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h
@@ -25,5 +25,6 @@
 #define R9A09G087_CLK_PCLKM		13
 #define R9A09G087_CLK_PCLKL		14
 #define R9A09G087_SDHI_CLKHS		15
+#define R9A09G087_USB_CLK		16
 
 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G087_CPG_H__ */
-- 
2.50.1

Re: [PATCH 1/2] dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID

Posted by Krzysztof Kozlowski 2 months ago

On Mon, Aug 04, 2025 at 09:26:42PM +0100, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Add USB clock (USB_CLK) definition for the Renesas RZ/T2H (R9A09G077)
> and RZ/N2H (R9A09G087) SoCs. USB_CLK is used as the reference clock for
> USB PHY layer.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
>  include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h | 1 +
>  include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h | 1 +
>  2 files changed, 2 insertions(+)

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH 1/2] dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID

Posted by Geert Uytterhoeven 1 month, 3 weeks ago

On Mon, 4 Aug 2025 at 22:27, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add USB clock (USB_CLK) definition for the Renesas RZ/T2H (R9A09G077)
> and RZ/N2H (R9A09G087) SoCs. USB_CLK is used as the reference clock for
> USB PHY layer.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue for v6.18 in a branch shared by clock and DT source code.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds