The kernel now handles level shifter limitations affecting SD card
modes, making it unnecessary to explicitly disable SDR104 and SDR50
capabilities in the device tree.
However, due to board-specific hardware constraints particularly related
to level shifter in this case the maximum frequency for SD High-Speed
(HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
card in HS mode. This is achieved using the max-sd-hs-frequency property
in the board DTS.
Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 +
arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 +
arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 ---
4 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
index 29bc1ddfc7b2..a6bc3c11598b 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
@@ -1164,6 +1164,7 @@ &sdhc_2 {
vmmc-supply = <&vreg_l9b_2p9>;
vqmmc-supply = <&vreg_l8b_1p8>;
+ max-sd-hs-frequency = <37500000>;
bus-width = <4>;
no-sdio;
no-mmc;
diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
index 5648ab60ba4c..166d3595633d 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
@@ -818,6 +818,7 @@ &sdhc_2 {
pinctrl-1 = <&sdc2_sleep &sdc2_card_det_n>;
vmmc-supply = <&vreg_l9b_2p9>;
vqmmc-supply = <&vreg_l8b_1p8>;
+ max-sd-hs-frequency = <37500000>;
bus-width = <4>;
no-sdio;
no-mmc;
diff --git a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
index d90dc7b37c4a..039ead5b8784 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
@@ -716,6 +716,7 @@ &sdhc_2 {
pinctrl-names = "default", "sleep";
vmmc-supply = <&pm8550_l9>;
vqmmc-supply = <&pm8550_l8>;
+ max-sd-hs-frequency = <37500000>;
no-sdio;
no-mmc;
status = "okay";
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 82cabf777cd2..bc7c4b77f277 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3191,9 +3191,6 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
bus-width = <4>;
dma-coherent;
- /* Forbid SDR104/SDR50 - broken hw! */
- sdhci-caps-mask = <0x3 0>;
-
status = "disabled";
sdhc2_opp_table: opp-table {
--
2.34.1On 01/08/2025 10:45, Sarthak Garg wrote: > The kernel now handles level shifter limitations affecting SD card > modes, making it unnecessary to explicitly disable SDR104 and SDR50 > capabilities in the device tree. > > However, due to board-specific hardware constraints particularly related > to level shifter in this case the maximum frequency for SD High-Speed > (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD > card in HS mode. This is achieved using the max-sd-hs-frequency property > in the board DTS. > > Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + > arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + > arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + > arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- > 4 files changed, 3 insertions(+), 3 deletions(-) > This will break MMC for all of the users and nothing in commit msg or cover letter explains that or mentions merging strategy. Exactly this case is covered by your internal guideline, no? Please read it. Best regards, Krzysztof
On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote: > On 01/08/2025 10:45, Sarthak Garg wrote: >> The kernel now handles level shifter limitations affecting SD card >> modes, making it unnecessary to explicitly disable SDR104 and SDR50 >> capabilities in the device tree. >> >> However, due to board-specific hardware constraints particularly related >> to level shifter in this case the maximum frequency for SD High-Speed >> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD >> card in HS mode. This is achieved using the max-sd-hs-frequency property >> in the board DTS. >> >> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + >> arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + >> arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + >> arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- >> 4 files changed, 3 insertions(+), 3 deletions(-) >> > > This will break MMC for all of the users and nothing in commit msg or > cover letter explains that or mentions merging strategy. > > Exactly this case is covered by your internal guideline, no? Please read it. > > Best regards, > Krzysztof Just to make sure I’m addressing the right concern — are you primarily worried about the introduction of the max-sd-hs-frequency property in the board DTS files, or about the removal of the sdhci-caps-mask from the common sm8550.dtsi?
On 05/08/2025 11:19, Sarthak Garg wrote: > > > On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote: >> On 01/08/2025 10:45, Sarthak Garg wrote: >>> The kernel now handles level shifter limitations affecting SD card >>> modes, making it unnecessary to explicitly disable SDR104 and SDR50 >>> capabilities in the device tree. >>> >>> However, due to board-specific hardware constraints particularly related >>> to level shifter in this case the maximum frequency for SD High-Speed >>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD >>> card in HS mode. This is achieved using the max-sd-hs-frequency property >>> in the board DTS. >>> >>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com> >>> --- >>> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + >>> arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + >>> arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + >>> arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- >>> 4 files changed, 3 insertions(+), 3 deletions(-) >>> >> >> This will break MMC for all of the users and nothing in commit msg or >> cover letter explains that or mentions merging strategy. >> >> Exactly this case is covered by your internal guideline, no? Please read it. >> >> Best regards, >> Krzysztof > > Just to make sure I’m addressing the right concern — are you primarily > worried about the introduction of the max-sd-hs-frequency property in > the board DTS files, or about the removal of the sdhci-caps-mask > from the common sm8550.dtsi? Apply this patch and test MMC. Does it work? No. Was it working? Yes. Best regards, Krzysztof
On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote: > On 05/08/2025 11:19, Sarthak Garg wrote: >> >> >> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote: >>> On 01/08/2025 10:45, Sarthak Garg wrote: >>>> The kernel now handles level shifter limitations affecting SD card >>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50 >>>> capabilities in the device tree. >>>> >>>> However, due to board-specific hardware constraints particularly related >>>> to level shifter in this case the maximum frequency for SD High-Speed >>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD >>>> card in HS mode. This is achieved using the max-sd-hs-frequency property >>>> in the board DTS. >>>> >>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com> >>>> --- >>>> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + >>>> arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + >>>> arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + >>>> arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- >>>> 4 files changed, 3 insertions(+), 3 deletions(-) >>>> >>> >>> This will break MMC for all of the users and nothing in commit msg or >>> cover letter explains that or mentions merging strategy. >>> >>> Exactly this case is covered by your internal guideline, no? Please read it. >>> >>> Best regards, >>> Krzysztof >> >> Just to make sure I’m addressing the right concern — are you primarily >> worried about the introduction of the max-sd-hs-frequency property in >> the board DTS files, or about the removal of the sdhci-caps-mask >> from the common sm8550.dtsi? > > > Apply this patch and test MMC. Does it work? No. Was it working? Yes. > > > Best regards, > Krzysztof You're absolutely right to raise the concern about potential breakage. After conducting additional testing across multiple boards, I’ve confirmed that the removal of SDR104/SDR50 broken capabilities does indeed affect V1 SM8550 devices. However, on V2 devices, all modes—including SDR104, SDR50, and HS—are fully functional and have been verified to work reliably. Based on your feedback, I will revise the patch to retain the broken SDR104/SDR50 capabilities in the common sm8550.dtsi, ensuring no impact on current sm8550 devices already in use. We will revisit the removal of broken capabilities dt property for upcoming targets after thorough validation and testing to ensure no regressions from the beginning. Please let me know if this approach aligns with your expectations. I’ll prepare and send out a revised patch accordingly. Best regards, Sarthak
On 8/13/25 1:08 PM, Sarthak Garg wrote: > > > On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote: >> On 05/08/2025 11:19, Sarthak Garg wrote: >>> >>> >>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote: >>>> On 01/08/2025 10:45, Sarthak Garg wrote: >>>>> The kernel now handles level shifter limitations affecting SD card >>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50 >>>>> capabilities in the device tree. >>>>> >>>>> However, due to board-specific hardware constraints particularly related >>>>> to level shifter in this case the maximum frequency for SD High-Speed >>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD >>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property >>>>> in the board DTS. >>>>> >>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com> >>>>> --- >>>>> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + >>>>> arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + >>>>> arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + >>>>> arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- >>>>> 4 files changed, 3 insertions(+), 3 deletions(-) >>>>> >>>> >>>> This will break MMC for all of the users and nothing in commit msg or >>>> cover letter explains that or mentions merging strategy. >>>> >>>> Exactly this case is covered by your internal guideline, no? Please read it. >>>> >>>> Best regards, >>>> Krzysztof >>> >>> Just to make sure I’m addressing the right concern — are you primarily >>> worried about the introduction of the max-sd-hs-frequency property in >>> the board DTS files, or about the removal of the sdhci-caps-mask >>> from the common sm8550.dtsi? >> >> >> Apply this patch and test MMC. Does it work? No. Was it working? Yes. >> >> >> Best regards, >> Krzysztof > > > You're absolutely right to raise the concern about potential breakage. > After conducting additional testing across multiple boards, I’ve confirmed that the removal of SDR104/SDR50 broken capabilities does indeed affect V1 SM8550 devices. v1 is a prototype revision, please forget it exists, we most definitely do not support it upstream Konrad > However, on V2 devices, all modes—including SDR104, SDR50, and HS—are fully functional and have been verified to work reliably. > > Based on your feedback, I will revise the patch to retain the broken SDR104/SDR50 capabilities in the common sm8550.dtsi, ensuring no impact on current sm8550 devices already in use. > > We will revisit the removal of broken capabilities dt property for upcoming targets after thorough validation and testing to ensure no regressions from the beginning. > > Please let me know if this approach aligns with your expectations. I’ll prepare and send out a revised patch accordingly. > > Best regards, > Sarthak
On 13/08/2025 13:21, Konrad Dybcio wrote: > On 8/13/25 1:08 PM, Sarthak Garg wrote: >> >> >> On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote: >>> On 05/08/2025 11:19, Sarthak Garg wrote: >>>> >>>> >>>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote: >>>>> On 01/08/2025 10:45, Sarthak Garg wrote: >>>>>> The kernel now handles level shifter limitations affecting SD card >>>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50 >>>>>> capabilities in the device tree. >>>>>> >>>>>> However, due to board-specific hardware constraints particularly related >>>>>> to level shifter in this case the maximum frequency for SD High-Speed >>>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD >>>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property >>>>>> in the board DTS. >>>>>> >>>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com> >>>>>> --- >>>>>> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + >>>>>> arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + >>>>>> arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + >>>>>> arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- >>>>>> 4 files changed, 3 insertions(+), 3 deletions(-) >>>>>> >>>>> >>>>> This will break MMC for all of the users and nothing in commit msg or >>>>> cover letter explains that or mentions merging strategy. >>>>> >>>>> Exactly this case is covered by your internal guideline, no? Please read it. >>>>> >>>>> Best regards, >>>>> Krzysztof >>>> >>>> Just to make sure I’m addressing the right concern — are you primarily >>>> worried about the introduction of the max-sd-hs-frequency property in >>>> the board DTS files, or about the removal of the sdhci-caps-mask >>>> from the common sm8550.dtsi? >>> >>> >>> Apply this patch and test MMC. Does it work? No. Was it working? Yes. >>> >>> >>> Best regards, >>> Krzysztof >> >> >> You're absolutely right to raise the concern about potential breakage. >> After conducting additional testing across multiple boards, I’ve confirmed that the removal of SDR104/SDR50 broken capabilities does indeed affect V1 SM8550 devices. > > v1 is a prototype revision, please forget it exists, we most definitely > do not support it upstream You should double check. SM8450 (not v1!) needed it, so either it was copied to SM8550 (v2!) by mistake or was also needed. Best regards, Krzysztof
On 8/13/25 1:56 PM, Krzysztof Kozlowski wrote: > On 13/08/2025 13:21, Konrad Dybcio wrote: >> On 8/13/25 1:08 PM, Sarthak Garg wrote: >>> >>> >>> On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote: >>>> On 05/08/2025 11:19, Sarthak Garg wrote: >>>>> >>>>> >>>>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote: >>>>>> On 01/08/2025 10:45, Sarthak Garg wrote: >>>>>>> The kernel now handles level shifter limitations affecting SD card >>>>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50 >>>>>>> capabilities in the device tree. >>>>>>> >>>>>>> However, due to board-specific hardware constraints particularly related >>>>>>> to level shifter in this case the maximum frequency for SD High-Speed >>>>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD >>>>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property >>>>>>> in the board DTS. >>>>>>> >>>>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com> >>>>>>> --- >>>>>>> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + >>>>>>> arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + >>>>>>> arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + >>>>>>> arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- >>>>>>> 4 files changed, 3 insertions(+), 3 deletions(-) >>>>>>> >>>>>> >>>>>> This will break MMC for all of the users and nothing in commit msg or >>>>>> cover letter explains that or mentions merging strategy. >>>>>> >>>>>> Exactly this case is covered by your internal guideline, no? Please read it. >>>>>> >>>>>> Best regards, >>>>>> Krzysztof >>>>> >>>>> Just to make sure I’m addressing the right concern — are you primarily >>>>> worried about the introduction of the max-sd-hs-frequency property in >>>>> the board DTS files, or about the removal of the sdhci-caps-mask >>>>> from the common sm8550.dtsi? >>>> >>>> >>>> Apply this patch and test MMC. Does it work? No. Was it working? Yes. >>>> >>>> >>>> Best regards, >>>> Krzysztof >>> >>> >>> You're absolutely right to raise the concern about potential breakage. >>> After conducting additional testing across multiple boards, I’ve confirmed that the removal of SDR104/SDR50 broken capabilities does indeed affect V1 SM8550 devices. >> >> v1 is a prototype revision, please forget it exists, we most definitely >> do not support it upstream > > > You should double check. SM8450 (not v1!) needed it, so either it was > copied to SM8550 (v2!) by mistake or was also needed. I believe that the speed capabilities are indeed restricted on 8550-final and that's why this patchset exists in the first place Konrad
On 8/13/2025 5:37 PM, Konrad Dybcio wrote: > On 8/13/25 1:56 PM, Krzysztof Kozlowski wrote: >> On 13/08/2025 13:21, Konrad Dybcio wrote: >>> On 8/13/25 1:08 PM, Sarthak Garg wrote: >>>> >>>> >>>> On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote: >>>>> On 05/08/2025 11:19, Sarthak Garg wrote: >>>>>> >>>>>> >>>>>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote: >>>>>>> On 01/08/2025 10:45, Sarthak Garg wrote: >>>>>>>> The kernel now handles level shifter limitations affecting SD card >>>>>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50 >>>>>>>> capabilities in the device tree. >>>>>>>> >>>>>>>> However, due to board-specific hardware constraints particularly related >>>>>>>> to level shifter in this case the maximum frequency for SD High-Speed >>>>>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD >>>>>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property >>>>>>>> in the board DTS. >>>>>>>> >>>>>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com> >>>>>>>> --- >>>>>>>> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + >>>>>>>> arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + >>>>>>>> arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + >>>>>>>> arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- >>>>>>>> 4 files changed, 3 insertions(+), 3 deletions(-) >>>>>>>> >>>>>>> >>>>>>> This will break MMC for all of the users and nothing in commit msg or >>>>>>> cover letter explains that or mentions merging strategy. >>>>>>> >>>>>>> Exactly this case is covered by your internal guideline, no? Please read it. >>>>>>> >>>>>>> Best regards, >>>>>>> Krzysztof >>>>>> >>>>>> Just to make sure I’m addressing the right concern — are you primarily >>>>>> worried about the introduction of the max-sd-hs-frequency property in >>>>>> the board DTS files, or about the removal of the sdhci-caps-mask >>>>>> from the common sm8550.dtsi? >>>>> >>>>> >>>>> Apply this patch and test MMC. Does it work? No. Was it working? Yes. >>>>> >>>>> >>>>> Best regards, >>>>> Krzysztof >>>> >>>> >>>> You're absolutely right to raise the concern about potential breakage. >>>> After conducting additional testing across multiple boards, I’ve confirmed that the removal of SDR104/SDR50 broken capabilities does indeed affect V1 SM8550 devices. >>> >>> v1 is a prototype revision, please forget it exists, we most definitely >>> do not support it upstream >> >> >> You should double check. SM8450 (not v1!) needed it, so either it was >> copied to SM8550 (v2!) by mistake or was also needed. > > I believe that the speed capabilities are indeed restricted on 8550-final > and that's why this patchset exists in the first place > > Konrad Hi Krzysztof, Konrad, Konrad is right — this patch series addresses limitations seen on SM8550-final silicon. SDR50 mode: The tuning support introduced in this series helps ensure reliable operation. SDR104 mode: limitations are resolved in SM8550 v2. But still to avoid regressions, *I’ll like to retain sdhci-caps-mask in sm8550.dtsi for now and revisit its removal for future targets after thorough validation and testing from the beginning.* Konrad suggested placing max-sd-hs-frequency in the SoC dtsi. Krzysztof, could you please share your thoughts on this approach? Best regards, Sarthak Garg
On 14/08/2025 09:15, Sarthak Garg wrote: > > > On 8/13/2025 5:37 PM, Konrad Dybcio wrote: >> On 8/13/25 1:56 PM, Krzysztof Kozlowski wrote: >>> On 13/08/2025 13:21, Konrad Dybcio wrote: >>>> On 8/13/25 1:08 PM, Sarthak Garg wrote: >>>>> >>>>> >>>>> On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote: >>>>>> On 05/08/2025 11:19, Sarthak Garg wrote: >>>>>>> >>>>>>> >>>>>>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote: >>>>>>>> On 01/08/2025 10:45, Sarthak Garg wrote: >>>>>>>>> The kernel now handles level shifter limitations affecting SD card >>>>>>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50 >>>>>>>>> capabilities in the device tree. >>>>>>>>> >>>>>>>>> However, due to board-specific hardware constraints particularly related >>>>>>>>> to level shifter in this case the maximum frequency for SD High-Speed >>>>>>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD >>>>>>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property >>>>>>>>> in the board DTS. >>>>>>>>> >>>>>>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com> >>>>>>>>> --- >>>>>>>>> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + >>>>>>>>> arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + >>>>>>>>> arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + >>>>>>>>> arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- >>>>>>>>> 4 files changed, 3 insertions(+), 3 deletions(-) >>>>>>>>> >>>>>>>> >>>>>>>> This will break MMC for all of the users and nothing in commit msg or >>>>>>>> cover letter explains that or mentions merging strategy. >>>>>>>> >>>>>>>> Exactly this case is covered by your internal guideline, no? Please read it. >>>>>>>> >>>>>>>> Best regards, >>>>>>>> Krzysztof >>>>>>> >>>>>>> Just to make sure I’m addressing the right concern — are you primarily >>>>>>> worried about the introduction of the max-sd-hs-frequency property in >>>>>>> the board DTS files, or about the removal of the sdhci-caps-mask >>>>>>> from the common sm8550.dtsi? >>>>>> >>>>>> >>>>>> Apply this patch and test MMC. Does it work? No. Was it working? Yes. >>>>>> >>>>>> >>>>>> Best regards, >>>>>> Krzysztof >>>>> >>>>> >>>>> You're absolutely right to raise the concern about potential breakage. >>>>> After conducting additional testing across multiple boards, I’ve confirmed that the removal of SDR104/SDR50 broken capabilities does indeed affect V1 SM8550 devices. >>>> >>>> v1 is a prototype revision, please forget it exists, we most definitely >>>> do not support it upstream >>> >>> >>> You should double check. SM8450 (not v1!) needed it, so either it was >>> copied to SM8550 (v2!) by mistake or was also needed. >> >> I believe that the speed capabilities are indeed restricted on 8550-final >> and that's why this patchset exists in the first place >> >> Konrad > > Hi Krzysztof, Konrad, > > Konrad is right — this patch series addresses limitations seen on > SM8550-final silicon. > > SDR50 mode: The tuning support introduced in this series helps ensure > reliable operation. > SDR104 mode: limitations are resolved in SM8550 v2. I guess the state is the same for SM8650, it also requires the max-sd-hs-frequency. I guess all boards with a level-shifter on board would need such limitation, including most of the HDK boards (SM8450 included) Neil > > But still to avoid regressions, *I’ll like to retain sdhci-caps-mask in > sm8550.dtsi for now and revisit its removal for future targets after > thorough validation and testing from the beginning.* > > Konrad suggested placing max-sd-hs-frequency in the SoC dtsi. > Krzysztof, could you please share your thoughts on this approach? > > Best regards, > Sarthak Garg
On 8/19/2025 7:00 PM, Neil Armstrong wrote: > On 14/08/2025 09:15, Sarthak Garg wrote: >> >> >> On 8/13/2025 5:37 PM, Konrad Dybcio wrote: >>> On 8/13/25 1:56 PM, Krzysztof Kozlowski wrote: >>>> On 13/08/2025 13:21, Konrad Dybcio wrote: >>>>> On 8/13/25 1:08 PM, Sarthak Garg wrote: >>>>>> >>>>>> >>>>>> On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote: >>>>>>> On 05/08/2025 11:19, Sarthak Garg wrote: >>>>>>>> >>>>>>>> >>>>>>>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote: >>>>>>>>> On 01/08/2025 10:45, Sarthak Garg wrote: >>>>>>>>>> The kernel now handles level shifter limitations affecting SD >>>>>>>>>> card >>>>>>>>>> modes, making it unnecessary to explicitly disable SDR104 and >>>>>>>>>> SDR50 >>>>>>>>>> capabilities in the device tree. >>>>>>>>>> >>>>>>>>>> However, due to board-specific hardware constraints >>>>>>>>>> particularly related >>>>>>>>>> to level shifter in this case the maximum frequency for SD >>>>>>>>>> High-Speed >>>>>>>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable >>>>>>>>>> operation of SD >>>>>>>>>> card in HS mode. This is achieved using the >>>>>>>>>> max-sd-hs-frequency property >>>>>>>>>> in the board DTS. >>>>>>>>>> >>>>>>>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com> >>>>>>>>>> --- >>>>>>>>>> >>>>>>>>>> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + >>>>>>>>>> >>>>>>>>>> arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + >>>>>>>>>> >>>>>>>>>> arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + >>>>>>>>>> >>>>>>>>>> arch/arm64/boot/dts/qcom/sm8550.dtsi | >>>>>>>>>> 3 --- >>>>>>>>>> 4 files changed, 3 insertions(+), 3 deletions(-) >>>>>>>>>> >>>>>>>>> >>>>>>>>> This will break MMC for all of the users and nothing in commit >>>>>>>>> msg or >>>>>>>>> cover letter explains that or mentions merging strategy. >>>>>>>>> >>>>>>>>> Exactly this case is covered by your internal guideline, no? >>>>>>>>> Please read it. >>>>>>>>> >>>>>>>>> Best regards, >>>>>>>>> Krzysztof >>>>>>>> >>>>>>>> Just to make sure I’m addressing the right concern — are you >>>>>>>> primarily >>>>>>>> worried about the introduction of the max-sd-hs-frequency >>>>>>>> property in >>>>>>>> the board DTS files, or about the removal of the sdhci-caps-mask >>>>>>>> from the common sm8550.dtsi? >>>>>>> >>>>>>> >>>>>>> Apply this patch and test MMC. Does it work? No. Was it working? >>>>>>> Yes. >>>>>>> >>>>>>> >>>>>>> Best regards, >>>>>>> Krzysztof >>>>>> >>>>>> >>>>>> You're absolutely right to raise the concern about potential >>>>>> breakage. >>>>>> After conducting additional testing across multiple boards, I’ve >>>>>> confirmed that the removal of SDR104/SDR50 broken capabilities >>>>>> does indeed affect V1 SM8550 devices. >>>>> >>>>> v1 is a prototype revision, please forget it exists, we most >>>>> definitely >>>>> do not support it upstream >>>> >>>> >>>> You should double check. SM8450 (not v1!) needed it, so either it was >>>> copied to SM8550 (v2!) by mistake or was also needed. >>> >>> I believe that the speed capabilities are indeed restricted on >>> 8550-final >>> and that's why this patchset exists in the first place >>> >>> Konrad >> >> Hi Krzysztof, Konrad, >> >> Konrad is right — this patch series addresses limitations seen on >> SM8550-final silicon. >> >> SDR50 mode: The tuning support introduced in this series helps ensure >> reliable operation. >> SDR104 mode: limitations are resolved in SM8550 v2. > > I guess the state is the same for SM8650, it also requires the > max-sd-hs-frequency. > > I guess all boards with a level-shifter on board would need such > limitation, > including most of the HDK boards (SM8450 included) > > Neil > Yes, that makes sense Neil — all boards with a level-shifter on board would likely need this limitation, including SM8450, SM8550, and SM8650. >> >> But still to avoid regressions, *I’ll like to retain sdhci-caps-mask in >> sm8550.dtsi for now and revisit its removal for future targets after >> thorough validation and testing from the beginning.* >> >> Konrad suggested placing max-sd-hs-frequency in the SoC dtsi. >> Krzysztof, could you please share your thoughts on this approach? >> >> Best regards, >> Sarthak Garg >
On Tue, Aug 05, 2025 at 02:49:29PM +0530, Sarthak Garg wrote: > > > On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote: > > On 01/08/2025 10:45, Sarthak Garg wrote: > > > The kernel now handles level shifter limitations affecting SD card > > > modes, making it unnecessary to explicitly disable SDR104 and SDR50 > > > capabilities in the device tree. > > > > > > However, due to board-specific hardware constraints particularly related > > > to level shifter in this case the maximum frequency for SD High-Speed > > > (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD > > > card in HS mode. This is achieved using the max-sd-hs-frequency property > > > in the board DTS. > > > > > > Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com> > > > --- > > > arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + > > > arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + > > > arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + > > > arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- You missed several devices which use SM8550. Please fix that. > > > 4 files changed, 3 insertions(+), 3 deletions(-) > > > > > > > This will break MMC for all of the users and nothing in commit msg or > > cover letter explains that or mentions merging strategy. > > > > Exactly this case is covered by your internal guideline, no? Please read it. > > > > Best regards, > > Krzysztof > > Just to make sure I’m addressing the right concern — are you primarily > worried about the introduction of the max-sd-hs-frequency property in the > board DTS files, or about the removal of the sdhci-caps-mask > from the common sm8550.dtsi? This patch requires all previous patches to work, so it can not be applied in parallel. It should be applied after the previous patches are merged by MMC maintainers and then available in the Bjorn's tree. This requires either skipping a release for this patch or using an immutable tag for the MMC patches. All these deteails should be explained in the cover letter. -- With best wishes Dmitry
On 8/5/25 11:59 AM, Dmitry Baryshkov wrote: > On Tue, Aug 05, 2025 at 02:49:29PM +0530, Sarthak Garg wrote: >> >> >> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote: >>> On 01/08/2025 10:45, Sarthak Garg wrote: >>>> The kernel now handles level shifter limitations affecting SD card >>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50 >>>> capabilities in the device tree. >>>> >>>> However, due to board-specific hardware constraints particularly related >>>> to level shifter in this case the maximum frequency for SD High-Speed >>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD >>>> card in HS mode. This is achieved using the max-sd-hs-frequency property >>>> in the board DTS. >>>> >>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com> >>>> --- >>>> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + >>>> arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + >>>> arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + >>>> arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- > > You missed several devices which use SM8550. Please fix that. I would be in favor of making this addition in the SoC dtsi and removing/ altering it on a case by case basis, since as I explained in the threads of previous revisions, the fix for the limitation is additional on-board hardware Konrad
On 8/5/2025 6:38 PM, Konrad Dybcio wrote: > On 8/5/25 11:59 AM, Dmitry Baryshkov wrote: >> On Tue, Aug 05, 2025 at 02:49:29PM +0530, Sarthak Garg wrote: >>> >>> >>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote: >>>> On 01/08/2025 10:45, Sarthak Garg wrote: >>>>> The kernel now handles level shifter limitations affecting SD card >>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50 >>>>> capabilities in the device tree. >>>>> >>>>> However, due to board-specific hardware constraints particularly related >>>>> to level shifter in this case the maximum frequency for SD High-Speed >>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD >>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property >>>>> in the board DTS. >>>>> >>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com> >>>>> --- >>>>> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + >>>>> arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + >>>>> arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + >>>>> arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- >> >> You missed several devices which use SM8550. Please fix that. > > I would be in favor of making this addition in the SoC dtsi and removing/ > altering it on a case by case basis, since as I explained in the threads > of previous revisions, the fix for the limitation is additional on-board > hardware > > Konrad @Krzysztof Kozlowski please let me know your view on placement of the max-sd-hs-frequency DT property in SOC dtsi as per above comment. Best regards, Sarthak
On 8/5/2025 3:29 PM, Dmitry Baryshkov wrote: > On Tue, Aug 05, 2025 at 02:49:29PM +0530, Sarthak Garg wrote: >> >> >> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote: >>> On 01/08/2025 10:45, Sarthak Garg wrote: >>>> The kernel now handles level shifter limitations affecting SD card >>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50 >>>> capabilities in the device tree. >>>> >>>> However, due to board-specific hardware constraints particularly related >>>> to level shifter in this case the maximum frequency for SD High-Speed >>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD >>>> card in HS mode. This is achieved using the max-sd-hs-frequency property >>>> in the board DTS. >>>> >>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com> >>>> --- >>>> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + >>>> arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + >>>> arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + >>>> arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- > > You missed several devices which use SM8550. Please fix that. > >>>> 4 files changed, 3 insertions(+), 3 deletions(-) >>>> >>> >>> This will break MMC for all of the users and nothing in commit msg or >>> cover letter explains that or mentions merging strategy. >>> >>> Exactly this case is covered by your internal guideline, no? Please read it. >>> >>> Best regards, >>> Krzysztof >> >> Just to make sure I’m addressing the right concern — are you primarily >> worried about the introduction of the max-sd-hs-frequency property in the >> board DTS files, or about the removal of the sdhci-caps-mask >> from the common sm8550.dtsi? > > This patch requires all previous patches to work, so it can not be > applied in parallel. It should be applied after the previous patches are > merged by MMC maintainers and then available in the Bjorn's tree. This > requires either skipping a release for this patch or using an immutable > tag for the MMC patches. All these deteails should be explained in the > cover letter. > As mentioned in reply to Krzysztof's previous comment we are planning to drop the plan to modify broken capabilities for SM8550 in the current cycle. The removal of SDR104/SDR50 caps will be revisited for upcoming targets, where we can ensure proper validation and alignment with MMC patch dependencies. Best regards, Sarthak
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