drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-)
The repeated checks on grbm_soft_reset are unnecessary. Remove them.
Signed-off-by: Ethan Carter Edwards <ethan@ethancedwards.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 24 +++++++++++-------------
1 file changed, 11 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 6a9cf3587cc6f0a0d00ab1c109fd599dd8aa2579..a6ff9a137a83a93cde0b0c9c9e51db66374bcbee 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -4175,19 +4175,17 @@ static int gfx_v9_0_soft_reset(struct amdgpu_ip_block *ip_block)
/* Disable MEC parsing/prefetching */
gfx_v9_0_cp_compute_enable(adev, false);
- if (grbm_soft_reset) {
- tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);
- tmp |= grbm_soft_reset;
- dev_info(adev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp);
- WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);
- tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);
-
- udelay(50);
-
- tmp &= ~grbm_soft_reset;
- WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);
- tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);
- }
+ tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);
+ tmp |= grbm_soft_reset;
+ dev_info(adev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp);
+ WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);
+ tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);
+
+ udelay(50);
+
+ tmp &= ~grbm_soft_reset;
+ WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);
+ tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);
/* Wait a little for things to settle down */
udelay(50);
---
base-commit: b9ddaa95fd283bce7041550ddbbe7e764c477110
change-id: 20250801-amdgfxv9-30357749717e
Best regards,
--
Ethan Carter Edwards <ethan@ethancedwards.com>
On Sat, Aug 2, 2025 at 4:33 AM Ethan Carter Edwards <ethan@ethancedwards.com> wrote: > > The repeated checks on grbm_soft_reset are unnecessary. Remove them. > Same comment as the gfx10 patch. These are necessary. Alex > Signed-off-by: Ethan Carter Edwards <ethan@ethancedwards.com> > --- > drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 24 +++++++++++------------- > 1 file changed, 11 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > index 6a9cf3587cc6f0a0d00ab1c109fd599dd8aa2579..a6ff9a137a83a93cde0b0c9c9e51db66374bcbee 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > @@ -4175,19 +4175,17 @@ static int gfx_v9_0_soft_reset(struct amdgpu_ip_block *ip_block) > /* Disable MEC parsing/prefetching */ > gfx_v9_0_cp_compute_enable(adev, false); > > - if (grbm_soft_reset) { > - tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); > - tmp |= grbm_soft_reset; > - dev_info(adev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); > - WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); > - tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); > - > - udelay(50); > - > - tmp &= ~grbm_soft_reset; > - WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); > - tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); > - } > + tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); > + tmp |= grbm_soft_reset; > + dev_info(adev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); > + WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); > + tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); > + > + udelay(50); > + > + tmp &= ~grbm_soft_reset; > + WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); > + tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); > > /* Wait a little for things to settle down */ > udelay(50); > > --- > base-commit: b9ddaa95fd283bce7041550ddbbe7e764c477110 > change-id: 20250801-amdgfxv9-30357749717e > > Best regards, > -- > Ethan Carter Edwards <ethan@ethancedwards.com> >
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