Introduce new clock names that actually describe what the clock input is
used for instead of referring to a specific clock source.

The new clock input names are based on information from clock drivers
such as drivers/clk/sprd/ums512-clk.c. The 128M clock appears to be
CLK_DISPC0_DPI, the clock used for the DPI output from the DPU, while
the 384M clock is CLK_DISPC0, the actual DPU core clock. The DSI
controller's 96M clock is most likely CLK_DSI_APB, the APB clock used
for accessing its control registers.

Since it seems possible to configure different frequencies for these
clocks, the old bindings do not even accurately describe the hardware.
Deprecate the old clock names.

Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
---
 .../bindings/display/sprd/sprd,sharkl3-dpu.yaml         | 17 +++++++++++------
 .../bindings/display/sprd/sprd,sharkl3-dsi-host.yaml    | 11 ++++++++---
 2 files changed, 19 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dpu.yaml b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dpu.yaml
index cfa162178fe11df149f2f8dcb03383dafc44868e..7f34652080b22e7b7072a709fd390a72375110ef 100644
--- a/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dpu.yaml
@@ -33,9 +33,14 @@ properties:
     maxItems: 2
 
   clock-names:
-    items:
-      - const: clk_src_128m
-      - const: clk_src_384m
+    oneOf:
+      - deprecated: true
+        items:
+          - const: clk_src_128m
+          - const: clk_src_384m
+      - items:
+          - const: core
+          - const: dpi
 
   power-domains:
     maxItems: 1
@@ -69,10 +74,10 @@ examples:
         compatible = "sprd,sharkl3-dpu";
         reg = <0x63000000 0x1000>;
         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-        clock-names = "clk_src_128m", "clk_src_384m";
 
-        clocks = <&pll CLK_TWPLL_128M>,
-          <&pll CLK_TWPLL_384M>;
+        clocks = <&pll CLK_TWPLL_384M>,
+                 <&pll CLK_TWPLL_128M>;
+        clock-names = "core", "dpi";
 
         dpu_port: port {
             dpu_out: endpoint {
diff --git a/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml
index 9177ae6aa7a33f7f797b48cfe06cf8a5391b34a9..71abbc2de8dbb1b674f151a87490c865b187fdd0 100644
--- a/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml
+++ b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml
@@ -25,8 +25,12 @@ properties:
     maxItems: 1
 
   clock-names:
-    items:
-      - const: clk_src_96m
+    oneOf:
+      - deprecated: true
+        items:
+          - const: clk_src_96m
+      - items:
+          - const: pclk
 
   power-domains:
     maxItems: 1
@@ -75,8 +79,9 @@ examples:
         reg = <0x63100000 0x1000>;
         interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
           <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
-        clock-names = "clk_src_96m";
         clocks = <&pll CLK_TWPLL_96M>;
+        clock-names = "pclk";
+
         ports {
             #address-cells = <1>;
             #size-cells = <0>;

-- 
2.50.0

On Thu, 31 Jul 2025 17:51:15 +0200, Otto Pflüger wrote:
> Introduce new clock names that actually describe what the clock input is
> used for instead of referring to a specific clock source.
> 
> The new clock input names are based on information from clock drivers
> such as drivers/clk/sprd/ums512-clk.c. The 128M clock appears to be
> CLK_DISPC0_DPI, the clock used for the DPI output from the DPU, while
> the 384M clock is CLK_DISPC0, the actual DPU core clock. The DSI
> controller's 96M clock is most likely CLK_DSI_APB, the APB clock used
> for accessing its control registers.
> 
> Since it seems possible to configure different frequencies for these
> clocks, the old bindings do not even accurately describe the hardware.
> Deprecate the old clock names.
> 
> Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
> ---
>  .../bindings/display/sprd/sprd,sharkl3-dpu.yaml         | 17 +++++++++++------
>  .../bindings/display/sprd/sprd,sharkl3-dsi-host.yaml    | 11 ++++++++---
>  2 files changed, 19 insertions(+), 9 deletions(-)
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>

Rob Herring (Arm) <robh@kernel.org> 于2025年8月4日周一 00:54写道：
>
>
> On Thu, 31 Jul 2025 17:51:15 +0200, Otto Pflüger wrote:
> > Introduce new clock names that actually describe what the clock input is
> > used for instead of referring to a specific clock source.
> >
> > The new clock input names are based on information from clock drivers
> > such as drivers/clk/sprd/ums512-clk.c. The 128M clock appears to be
> > CLK_DISPC0_DPI, the clock used for the DPI output from the DPU, while
> > the 384M clock is CLK_DISPC0, the actual DPU core clock. The DSI
> > controller's 96M clock is most likely CLK_DSI_APB, the APB clock used
> > for accessing its control registers.
> >
> > Since it seems possible to configure different frequencies for these
> > clocks, the old bindings do not even accurately describe the hardware.
> > Deprecate the old clock names.
> >
> > Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
> > ---
> >  .../bindings/display/sprd/sprd,sharkl3-dpu.yaml         | 17 +++++++++++------
> >  .../bindings/display/sprd/sprd,sharkl3-dsi-host.yaml    | 11 ++++++++---
> >  2 files changed, 19 insertions(+), 9 deletions(-)
> >
>
> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
>
>
Reviewed-by: Cixi Geng <cixi.geng@linux.dev>