Enable the timers STM0 -> STM3 on the s32g274-rd2
The platform has 4 CPUs and the Linux STM timer driver is per
CPU. Enable 4 timers which will be used, other timers are useless for
the Linux kernel and there is no benefit to enable them.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
Cc: Thomas Fossati <thomas.fossati@linaro.org>
---
arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
index b5ba51696f43..505776d19151 100644
--- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
+++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
@@ -40,6 +40,22 @@ &uart1 {
status = "okay";
};
+&stm0 {
+ status = "okay";
+};
+
+&stm1 {
+ status = "okay";
+};
+
+&stm2 {
+ status = "okay";
+};
+
+&stm3 {
+ status = "okay";
+};
+
&usdhc0 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc0>;
--
2.43.0
On Wed, Jul 30, 2025 at 09:50:15PM +0200, Daniel Lezcano wrote: > Enable the timers STM0 -> STM3 on the s32g274-rd2 > > The platform has 4 CPUs and the Linux STM timer driver is per > CPU. Enable 4 timers which will be used, other timers are useless for > the Linux kernel and there is no benefit to enable them. S32 have not ARM local timer? It is quite strange! Frank > > Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> > Cc: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> > Cc: Thomas Fossati <thomas.fossati@linaro.org> > --- > arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts > index b5ba51696f43..505776d19151 100644 > --- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts > +++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts > @@ -40,6 +40,22 @@ &uart1 { > status = "okay"; > }; > > +&stm0 { > + status = "okay"; > +}; > + > +&stm1 { > + status = "okay"; > +}; > + > +&stm2 { > + status = "okay"; > +}; > + > +&stm3 { > + status = "okay"; > +}; > + > &usdhc0 { > pinctrl-names = "default", "state_100mhz", "state_200mhz"; > pinctrl-0 = <&pinctrl_usdhc0>; > -- > 2.43.0 >
On 30/07/2025 22:21, Frank Li wrote: > On Wed, Jul 30, 2025 at 09:50:15PM +0200, Daniel Lezcano wrote: >> Enable the timers STM0 -> STM3 on the s32g274-rd2 >> >> The platform has 4 CPUs and the Linux STM timer driver is per >> CPU. Enable 4 timers which will be used, other timers are useless for >> the Linux kernel and there is no benefit to enable them. > > S32 have not ARM local timer? It is quite strange! I'm not saying there is no architected timers but there are the STM. May be I can reword the sentence to prevent this ambiguity. >> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> >> Cc: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> >> Cc: Thomas Fossati <thomas.fossati@linaro.org> >> --- >> arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 16 ++++++++++++++++ >> 1 file changed, 16 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts >> index b5ba51696f43..505776d19151 100644 >> --- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts >> +++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts >> @@ -40,6 +40,22 @@ &uart1 { >> status = "okay"; >> }; >> >> +&stm0 { >> + status = "okay"; >> +}; >> + >> +&stm1 { >> + status = "okay"; >> +}; >> + >> +&stm2 { >> + status = "okay"; >> +}; >> + >> +&stm3 { >> + status = "okay"; >> +}; >> + >> &usdhc0 { >> pinctrl-names = "default", "state_100mhz", "state_200mhz"; >> pinctrl-0 = <&pinctrl_usdhc0>; >> -- >> 2.43.0 >> -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
On Wed, Jul 30, 2025 at 11:15:54PM +0200, Daniel Lezcano wrote: > On 30/07/2025 22:21, Frank Li wrote: > > On Wed, Jul 30, 2025 at 09:50:15PM +0200, Daniel Lezcano wrote: > > > Enable the timers STM0 -> STM3 on the s32g274-rd2 > > > > > > The platform has 4 CPUs and the Linux STM timer driver is per > > > CPU. Enable 4 timers which will be used, other timers are useless for > > > the Linux kernel and there is no benefit to enable them. > > > > S32 have not ARM local timer? It is quite strange! > > I'm not saying there is no architected timers but there are the STM. May be > I can reword the sentence to prevent this ambiguity. if there are local timer, why need STM for each core here? Frank > > > > Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> > > > Cc: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> > > > Cc: Thomas Fossati <thomas.fossati@linaro.org> > > > --- > > > arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 16 ++++++++++++++++ > > > 1 file changed, 16 insertions(+) > > > > > > diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts > > > index b5ba51696f43..505776d19151 100644 > > > --- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts > > > +++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts > > > @@ -40,6 +40,22 @@ &uart1 { > > > status = "okay"; > > > }; > > > > > > +&stm0 { > > > + status = "okay"; > > > +}; > > > + > > > +&stm1 { > > > + status = "okay"; > > > +}; > > > + > > > +&stm2 { > > > + status = "okay"; > > > +}; > > > + > > > +&stm3 { > > > + status = "okay"; > > > +}; > > > + > > > &usdhc0 { > > > pinctrl-names = "default", "state_100mhz", "state_200mhz"; > > > pinctrl-0 = <&pinctrl_usdhc0>; > > > -- > > > 2.43.0 > > > > > > -- > <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs > > Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | > <http://twitter.com/#!/linaroorg> Twitter | > <http://www.linaro.org/linaro-blog/> Blog
On 01/08/2025 01:17, Frank Li wrote: > On Wed, Jul 30, 2025 at 11:15:54PM +0200, Daniel Lezcano wrote: >> On 30/07/2025 22:21, Frank Li wrote: >>> On Wed, Jul 30, 2025 at 09:50:15PM +0200, Daniel Lezcano wrote: >>>> Enable the timers STM0 -> STM3 on the s32g274-rd2 >>>> >>>> The platform has 4 CPUs and the Linux STM timer driver is per >>>> CPU. Enable 4 timers which will be used, other timers are useless for >>>> the Linux kernel and there is no benefit to enable them. >>> >>> S32 have not ARM local timer? It is quite strange! >> >> I'm not saying there is no architected timers but there are the STM. May be >> I can reword the sentence to prevent this ambiguity. > > if there are local timer, why need STM for each core here? Yes, I had initially the same question when upstreaming the STM timer. Ghennadi explained the automotive designs can partition the system by running a firmware and several instances of Linux. By using the STM, it is then possible to have the firmware to read the STM counters or to stop the timers when the board switches to debug mode. Ghennadi can elaborate more on this if you need more context. -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
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