Add check for gphy in enable/disable phy calls and set power bits
in gphy control register.

Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
---
 drivers/net/dsa/b53/b53_mmap.c | 33 +++++++++++++++++++++++++++++----
 1 file changed, 29 insertions(+), 4 deletions(-)

diff --git a/drivers/net/dsa/b53/b53_mmap.c b/drivers/net/dsa/b53/b53_mmap.c
index 87e1338765c2..f4a59d8fbdd6 100644
--- a/drivers/net/dsa/b53/b53_mmap.c
+++ b/drivers/net/dsa/b53/b53_mmap.c
@@ -29,6 +29,10 @@
 #include "b53_priv.h"
 
 #define BCM63XX_EPHY_REG 0x3C
+#define BCM63268_GPHY_REG 0x54
+
+#define GPHY_CTRL_LOW_PWR	BIT(3)
+#define GPHY_CTRL_IDDQ_BIAS	BIT(0)
 
 struct b53_phy_info {
 	u32 gphy_port_mask;
@@ -292,13 +296,30 @@ static int bcm63xx_ephy_set(struct b53_device *dev, int port, bool enable)
 	return regmap_update_bits(gpio_ctrl, BCM63XX_EPHY_REG, mask, val);
 }
 
+static int bcm63268_gphy_set(struct b53_device *dev, bool enable)
+{
+	struct b53_mmap_priv *priv = dev->priv;
+	struct regmap *gpio_ctrl = priv->gpio_ctrl;
+	u32 mask = GPHY_CTRL_IDDQ_BIAS | GPHY_CTRL_LOW_PWR;
+	u32 val = 0;
+
+	if (!enable)
+		val = mask;
+
+	return regmap_update_bits(gpio_ctrl, BCM63268_GPHY_REG, mask, val);
+}
+
 static void b53_mmap_phy_enable(struct b53_device *dev, int port)
 {
 	struct b53_mmap_priv *priv = dev->priv;
 	int ret = 0;
 
-	if (priv->phy_info && (BIT(port) & priv->phy_info->ephy_port_mask))
-		ret = bcm63xx_ephy_set(dev, port, true);
+	if (priv->phy_info) {
+		if (BIT(port) & priv->phy_info->ephy_port_mask)
+			ret = bcm63xx_ephy_set(dev, port, true);
+		else if (BIT(port) & priv->phy_info->gphy_port_mask)
+			ret = bcm63268_gphy_set(dev, true);
+	}
 
 	if (!ret)
 		priv->phys_enabled |= BIT(port);
@@ -309,8 +330,12 @@ static void b53_mmap_phy_disable(struct b53_device *dev, int port)
 	struct b53_mmap_priv *priv = dev->priv;
 	int ret = 0;
 
-	if (priv->phy_info && (BIT(port) & priv->phy_info->ephy_port_mask))
-		ret = bcm63xx_ephy_set(dev, port, false);
+	if (priv->phy_info) {
+		if (BIT(port) & priv->phy_info->ephy_port_mask)
+			ret = bcm63xx_ephy_set(dev, port, false);
+		else if (BIT(port) & priv->phy_info->gphy_port_mask)
+			ret = bcm63268_gphy_set(dev, false);
+	}
 
 	if (!ret)
 		priv->phys_enabled &= ~BIT(port);
-- 
2.43.0

On Tue, Jul 29, 2025 at 07:03:36PM -0700, Kyle Hendry wrote:
> Add check for gphy in enable/disable phy calls and set power bits
> in gphy control register.
> 
> Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>

Hi Kyle,

Thanks for your patches.

Unfortunately net-next is currently closed. So I'd like to ask for you to
post this patchset when it reopens. You should include Florian's tags when
doing so.

## Form letter - net-next-closed

The merge window for v6.17 has begun and therefore net-next is closed
for new drivers, features, code refactoring and optimizations. We are
currently accepting bug fixes only.

Please repost when net-next reopens after 11th August.

RFC patches sent for review only are obviously welcome at any time.

See: https://www.kernel.org/doc/html/next/process/maintainer-netdev.html#development-cycle

> ---
>  drivers/net/dsa/b53/b53_mmap.c | 33 +++++++++++++++++++++++++++++----
>  1 file changed, 29 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/dsa/b53/b53_mmap.c b/drivers/net/dsa/b53/b53_mmap.c
> index 87e1338765c2..f4a59d8fbdd6 100644
> --- a/drivers/net/dsa/b53/b53_mmap.c
> +++ b/drivers/net/dsa/b53/b53_mmap.c
> @@ -29,6 +29,10 @@
>  #include "b53_priv.h"
>  
>  #define BCM63XX_EPHY_REG 0x3C
> +#define BCM63268_GPHY_REG 0x54
> +
> +#define GPHY_CTRL_LOW_PWR	BIT(3)
> +#define GPHY_CTRL_IDDQ_BIAS	BIT(0)
>  
>  struct b53_phy_info {
>  	u32 gphy_port_mask;
> @@ -292,13 +296,30 @@ static int bcm63xx_ephy_set(struct b53_device *dev, int port, bool enable)
>  	return regmap_update_bits(gpio_ctrl, BCM63XX_EPHY_REG, mask, val);
>  }
>  
> +static int bcm63268_gphy_set(struct b53_device *dev, bool enable)
> +{
> +	struct b53_mmap_priv *priv = dev->priv;
> +	struct regmap *gpio_ctrl = priv->gpio_ctrl;
> +	u32 mask = GPHY_CTRL_IDDQ_BIAS | GPHY_CTRL_LOW_PWR;
> +	u32 val = 0;

I'm also wondering if you could update this to follow the
reverse xmas tree - longest line to shortest - for local variable
declarations. I realise that isn't followed particularly well
in this file. But it is preferred for Networking code.

I think in this case that could be as follows (completely untested!):

	u32 mask = GPHY_CTRL_IDDQ_BIAS | GPHY_CTRL_LOW_PWR;
	struct b53_mmap_priv *priv = dev->priv;
	struct regmap *gpio_ctrl;
	u32 val = 0;

	gpio_ctrl = priv->gpio_ctrl;

Edward Cree's tool can be of assistance here.
https://github.com/ecree-solarflare/xmastree

> +
> +	if (!enable)
> +		val = mask;
> +
> +	return regmap_update_bits(gpio_ctrl, BCM63268_GPHY_REG, mask, val);
> +}
> +

...

-- 
pw-bot: defer

On 7/29/25 19:03, Kyle Hendry wrote:
> Add check for gphy in enable/disable phy calls and set power bits
> in gphy control register.
> 
> Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>

Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
-- 
Florian