[v1] Add support for MT8189 SCP and device tree bindings

[PATCH 3/3] remoteproc: mediatek: Support MT8189 SCP

Posted by Huayu Zong 2 months, 1 week ago

Add SCP support for mt8189.

Signed-off-by: Huayu Zong <huayu.zong@mediatek.com>
---
 drivers/remoteproc/mtk_common.h | 11 ++++++++++
 drivers/remoteproc/mtk_scp.c    | 37 ++++++++++++++++++++++++++++++---
 2 files changed, 45 insertions(+), 3 deletions(-)

diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h
index fd5c539ab2ac..fb2131e0ed07 100644
--- a/drivers/remoteproc/mtk_common.h
+++ b/drivers/remoteproc/mtk_common.h
@@ -35,6 +35,11 @@
 #define MT8186_SCP_L1_SRAM_PD_P1	0x40B0
 #define MT8186_SCP_L1_SRAM_PD_p2	0x40B4
 
+#define MT8189_SCP2APMCU_IPC_CLR	0x30010
+#define MT8189_SCP2SPM_IPC_CLR		0x30018
+#define MT8189_SCP_SECURE_DOMAIN	0xA080
+#define MT8189_SCP_DOMAIN_VAL		0x3303003
+
 #define MT8192_L2TCM_SRAM_PD_0		0x10C0
 #define MT8192_L2TCM_SRAM_PD_1		0x10C4
 #define MT8192_L2TCM_SRAM_PD_2		0x10C8
@@ -112,6 +117,12 @@ struct mtk_scp_of_data {
 
 	u32 host_to_scp_reg;
 	u32 host_to_scp_int_bit;
+	u32 scp_to_host_ipc_set_reg;
+	u32 scp_to_host_ipc_clr_reg;
+	u32 scp_to_spm_ipc_clr_reg;
+
+	u32 scp_secure_domain_reg;
+	u32 scp_domain_value;
 
 	size_t ipi_buf_offset;
 	const struct mtk_scp_sizes_data *scp_sizes;
diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c
index 8206a1766481..956793fc6901 100644
--- a/drivers/remoteproc/mtk_scp.c
+++ b/drivers/remoteproc/mtk_scp.c
@@ -225,7 +225,8 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp)
 {
 	u32 scp_to_host;
 
-	scp_to_host = readl(scp->cluster->reg_base + MT8192_SCP2APMCU_IPC_SET);
+	scp_to_host = readl(scp->cluster->reg_base +
+			    scp->data->scp_to_host_ipc_set_reg);
 
 	if (scp_to_host & MT8192_SCP_IPC_INT_BIT) {
 		scp_ipi_handler(scp);
@@ -235,7 +236,7 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp)
 		 * MT8192_SCP2APMCU_IPC.
 		 */
 		writel(MT8192_SCP_IPC_INT_BIT,
-		       scp->cluster->reg_base + MT8192_SCP2APMCU_IPC_CLR);
+		       scp->cluster->reg_base + scp->data->scp_to_host_ipc_clr_reg);
 	} else {
 		scp_wdt_handler(scp, scp_to_host);
 		writel(1, scp->cluster->reg_base + MT8192_CORE0_WDT_IRQ);
@@ -559,8 +560,10 @@ static int mt8188_scp_c1_before_load(struct mtk_scp *scp)
 
 static int mt8192_scp_before_load(struct mtk_scp *scp)
 {
+	u32 scp2spm_ipc_clr = scp->data->scp_to_spm_ipc_clr_reg;
+
 	/* clear SPM interrupt, SCP2SPM_IPC_CLR */
-	writel(0xff, scp->cluster->reg_base + MT8192_SCP2SPM_IPC_CLR);
+	writel(0xff, scp->cluster->reg_base + scp2spm_ipc_clr);
 
 	writel(1, scp->cluster->reg_base + MT8192_CORE0_SW_RSTN_SET);
 
@@ -574,6 +577,11 @@ static int mt8192_scp_before_load(struct mtk_scp *scp)
 	/* enable MPU for all memory regions */
 	writel(0xff, scp->cluster->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
 
+	/* set the domain of master in SCP */
+	if (scp->data->scp_secure_domain_reg)
+		writel(scp->data->scp_domain_value,
+		       scp->cluster->reg_base + scp->data->scp_secure_domain_reg);
+
 	return 0;
 }
 
@@ -1464,6 +1472,24 @@ static const struct mtk_scp_of_data mt8188_of_data_c1 = {
 	.scp_sizes = &mt8188_scp_c1_sizes,
 };
 
+static const struct mtk_scp_of_data mt8189_of_data = {
+	.scp_clk_get = mt8195_scp_clk_get,
+	.scp_before_load = mt8192_scp_before_load,
+	.scp_irq_handler = mt8192_scp_irq_handler,
+	.scp_reset_assert = mt8192_scp_reset_assert,
+	.scp_reset_deassert = mt8192_scp_reset_deassert,
+	.scp_stop = mt8192_scp_stop,
+	.scp_da_to_va = mt8192_scp_da_to_va,
+	.host_to_scp_reg = MT8192_GIPC_IN_SET,
+	.host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
+	.scp_to_host_ipc_set_reg = MT8192_SCP2APMCU_IPC_SET,
+	.scp_to_host_ipc_clr_reg = MT8189_SCP2APMCU_IPC_CLR,
+	.scp_to_spm_ipc_clr_reg = MT8189_SCP2SPM_IPC_CLR,
+	.scp_secure_domain_reg = MT8189_SCP_SECURE_DOMAIN,
+	.scp_domain_value = MT8189_SCP_DOMAIN_VAL,
+	.scp_sizes = &default_scp_sizes,
+};
+
 static const struct mtk_scp_of_data mt8192_of_data = {
 	.scp_clk_get = mt8192_scp_clk_get,
 	.scp_before_load = mt8192_scp_before_load,
@@ -1475,6 +1501,10 @@ static const struct mtk_scp_of_data mt8192_of_data = {
 	.host_to_scp_reg = MT8192_GIPC_IN_SET,
 	.host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
 	.scp_sizes = &default_scp_sizes,
+	.scp_to_host_ipc_set_reg = MT8192_SCP2APMCU_IPC_SET,
+	.scp_to_host_ipc_clr_reg = MT8192_SCP2APMCU_IPC_CLR,
+	.scp_to_spm_ipc_clr_reg = MT8192_SCP2SPM_IPC_CLR,
+	.scp_sizes = &default_scp_sizes,
 };
 
 static const struct mtk_scp_of_data mt8195_of_data = {
@@ -1520,6 +1550,7 @@ static const struct of_device_id mtk_scp_of_match[] = {
 	{ .compatible = "mediatek,mt8186-scp", .data = &mt8186_of_data },
 	{ .compatible = "mediatek,mt8188-scp", .data = &mt8188_of_data },
 	{ .compatible = "mediatek,mt8188-scp-dual", .data = &mt8188_of_data_cores },
+	{ .compatible = "mediatek,mt8189-scp", .data = &mt8189_of_data },
 	{ .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data },
 	{ .compatible = "mediatek,mt8195-scp", .data = &mt8195_of_data },
 	{ .compatible = "mediatek,mt8195-scp-dual", .data = &mt8195_of_data_cores },
-- 
2.45.2

Re: [PATCH 3/3] remoteproc: mediatek: Support MT8189 SCP

Posted by Mathieu Poirier 2 months, 1 week ago

Hi,

On Tue, Jul 29, 2025 at 10:31:13AM +0800, Huayu Zong wrote:
> Add SCP support for mt8189.
> 
> Signed-off-by: Huayu Zong <huayu.zong@mediatek.com>
> ---
>  drivers/remoteproc/mtk_common.h | 11 ++++++++++
>  drivers/remoteproc/mtk_scp.c    | 37 ++++++++++++++++++++++++++++++---
>  2 files changed, 45 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h
> index fd5c539ab2ac..fb2131e0ed07 100644
> --- a/drivers/remoteproc/mtk_common.h
> +++ b/drivers/remoteproc/mtk_common.h
> @@ -35,6 +35,11 @@
>  #define MT8186_SCP_L1_SRAM_PD_P1	0x40B0
>  #define MT8186_SCP_L1_SRAM_PD_p2	0x40B4
>  
> +#define MT8189_SCP2APMCU_IPC_CLR	0x30010
> +#define MT8189_SCP2SPM_IPC_CLR		0x30018
> +#define MT8189_SCP_SECURE_DOMAIN	0xA080
> +#define MT8189_SCP_DOMAIN_VAL		0x3303003
> +
>  #define MT8192_L2TCM_SRAM_PD_0		0x10C0
>  #define MT8192_L2TCM_SRAM_PD_1		0x10C4
>  #define MT8192_L2TCM_SRAM_PD_2		0x10C8
> @@ -112,6 +117,12 @@ struct mtk_scp_of_data {
>  
>  	u32 host_to_scp_reg;
>  	u32 host_to_scp_int_bit;
> +	u32 scp_to_host_ipc_set_reg;
> +	u32 scp_to_host_ipc_clr_reg;
> +	u32 scp_to_spm_ipc_clr_reg;
> +
> +	u32 scp_secure_domain_reg;
> +	u32 scp_domain_value;
>  
>  	size_t ipi_buf_offset;
>  	const struct mtk_scp_sizes_data *scp_sizes;
> diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c
> index 8206a1766481..956793fc6901 100644
> --- a/drivers/remoteproc/mtk_scp.c
> +++ b/drivers/remoteproc/mtk_scp.c
> @@ -225,7 +225,8 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp)
>  {
>  	u32 scp_to_host;
>  
> -	scp_to_host = readl(scp->cluster->reg_base + MT8192_SCP2APMCU_IPC_SET);
> +	scp_to_host = readl(scp->cluster->reg_base +
> +			    scp->data->scp_to_host_ipc_set_reg);

As far as I can tell, this is the same for both mt8189 and mt8192 - it should
not be needed.

>  
>  	if (scp_to_host & MT8192_SCP_IPC_INT_BIT) {
>  		scp_ipi_handler(scp);
> @@ -235,7 +236,7 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp)
>  		 * MT8192_SCP2APMCU_IPC.
>  		 */
>  		writel(MT8192_SCP_IPC_INT_BIT,
> -		       scp->cluster->reg_base + MT8192_SCP2APMCU_IPC_CLR);
> +		       scp->cluster->reg_base + scp->data->scp_to_host_ipc_clr_reg);
>  	} else {
>  		scp_wdt_handler(scp, scp_to_host);
>  		writel(1, scp->cluster->reg_base + MT8192_CORE0_WDT_IRQ);
> @@ -559,8 +560,10 @@ static int mt8188_scp_c1_before_load(struct mtk_scp *scp)
>  
>  static int mt8192_scp_before_load(struct mtk_scp *scp)
>  {
> +	u32 scp2spm_ipc_clr = scp->data->scp_to_spm_ipc_clr_reg;
> +
>  	/* clear SPM interrupt, SCP2SPM_IPC_CLR */
> -	writel(0xff, scp->cluster->reg_base + MT8192_SCP2SPM_IPC_CLR);
> +	writel(0xff, scp->cluster->reg_base + scp2spm_ipc_clr);
>  
>  	writel(1, scp->cluster->reg_base + MT8192_CORE0_SW_RSTN_SET);
>  
> @@ -574,6 +577,11 @@ static int mt8192_scp_before_load(struct mtk_scp *scp)
>  	/* enable MPU for all memory regions */
>  	writel(0xff, scp->cluster->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
>  
> +	/* set the domain of master in SCP */
> +	if (scp->data->scp_secure_domain_reg)
> +		writel(scp->data->scp_domain_value,
> +		       scp->cluster->reg_base + scp->data->scp_secure_domain_reg);
> +
>  	return 0;
>  }
>  
> @@ -1464,6 +1472,24 @@ static const struct mtk_scp_of_data mt8188_of_data_c1 = {
>  	.scp_sizes = &mt8188_scp_c1_sizes,
>  };
>  
> +static const struct mtk_scp_of_data mt8189_of_data = {
> +	.scp_clk_get = mt8195_scp_clk_get,
> +	.scp_before_load = mt8192_scp_before_load,
> +	.scp_irq_handler = mt8192_scp_irq_handler,
> +	.scp_reset_assert = mt8192_scp_reset_assert,
> +	.scp_reset_deassert = mt8192_scp_reset_deassert,
> +	.scp_stop = mt8192_scp_stop,
> +	.scp_da_to_va = mt8192_scp_da_to_va,
> +	.host_to_scp_reg = MT8192_GIPC_IN_SET,
> +	.host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
> +	.scp_to_host_ipc_set_reg = MT8192_SCP2APMCU_IPC_SET,
> +	.scp_to_host_ipc_clr_reg = MT8189_SCP2APMCU_IPC_CLR,
> +	.scp_to_spm_ipc_clr_reg = MT8189_SCP2SPM_IPC_CLR,
> +	.scp_secure_domain_reg = MT8189_SCP_SECURE_DOMAIN,
> +	.scp_domain_value = MT8189_SCP_DOMAIN_VAL,
> +	.scp_sizes = &default_scp_sizes,
> +};
> +
>  static const struct mtk_scp_of_data mt8192_of_data = {
>  	.scp_clk_get = mt8192_scp_clk_get,
>  	.scp_before_load = mt8192_scp_before_load,
> @@ -1475,6 +1501,10 @@ static const struct mtk_scp_of_data mt8192_of_data = {
>  	.host_to_scp_reg = MT8192_GIPC_IN_SET,
>  	.host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
>  	.scp_sizes = &default_scp_sizes,
> +	.scp_to_host_ipc_set_reg = MT8192_SCP2APMCU_IPC_SET,
> +	.scp_to_host_ipc_clr_reg = MT8192_SCP2APMCU_IPC_CLR,
> +	.scp_to_spm_ipc_clr_reg = MT8192_SCP2SPM_IPC_CLR,
> +	.scp_sizes = &default_scp_sizes,

You are introducing a duplicate .scp_sizes

Thanks,
Mathieu

>  };
>  
>  static const struct mtk_scp_of_data mt8195_of_data = {
> @@ -1520,6 +1550,7 @@ static const struct of_device_id mtk_scp_of_match[] = {
>  	{ .compatible = "mediatek,mt8186-scp", .data = &mt8186_of_data },
>  	{ .compatible = "mediatek,mt8188-scp", .data = &mt8188_of_data },
>  	{ .compatible = "mediatek,mt8188-scp-dual", .data = &mt8188_of_data_cores },
> +	{ .compatible = "mediatek,mt8189-scp", .data = &mt8189_of_data },
>  	{ .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data },
>  	{ .compatible = "mediatek,mt8195-scp", .data = &mt8195_of_data },
>  	{ .compatible = "mediatek,mt8195-scp-dual", .data = &mt8195_of_data_cores },
> -- 
> 2.45.2
>

Re: [PATCH 3/3] remoteproc: mediatek: Support MT8189 SCP

Posted by Huayu Zong (纵华宇) 2 months ago

On Wed, 2025-07-30 at 09:07 -0600, Mathieu Poirier wrote:
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> 
> 
> Hi,
> 
> On Tue, Jul 29, 2025 at 10:31:13AM +0800, Huayu Zong wrote:
> > Add SCP support for mt8189.
> > 
> > Signed-off-by: Huayu Zong <huayu.zong@mediatek.com>
> > ---
> >  drivers/remoteproc/mtk_common.h | 11 ++++++++++
> >  drivers/remoteproc/mtk_scp.c    | 37
> > ++++++++++++++++++++++++++++++---
> >  2 files changed, 45 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/remoteproc/mtk_common.h
> > b/drivers/remoteproc/mtk_common.h
> > index fd5c539ab2ac..fb2131e0ed07 100644
> > --- a/drivers/remoteproc/mtk_common.h
> > +++ b/drivers/remoteproc/mtk_common.h
> > @@ -35,6 +35,11 @@
> >  #define MT8186_SCP_L1_SRAM_PD_P1     0x40B0
> >  #define MT8186_SCP_L1_SRAM_PD_p2     0x40B4
> > 
> > +#define MT8189_SCP2APMCU_IPC_CLR     0x30010
> > +#define MT8189_SCP2SPM_IPC_CLR               0x30018
> > +#define MT8189_SCP_SECURE_DOMAIN     0xA080
> > +#define MT8189_SCP_DOMAIN_VAL                0x3303003
> > +
> >  #define MT8192_L2TCM_SRAM_PD_0               0x10C0
> >  #define MT8192_L2TCM_SRAM_PD_1               0x10C4
> >  #define MT8192_L2TCM_SRAM_PD_2               0x10C8
> > @@ -112,6 +117,12 @@ struct mtk_scp_of_data {
> > 
> >       u32 host_to_scp_reg;
> >       u32 host_to_scp_int_bit;
> > +     u32 scp_to_host_ipc_set_reg;
> > +     u32 scp_to_host_ipc_clr_reg;
> > +     u32 scp_to_spm_ipc_clr_reg;
> > +
> > +     u32 scp_secure_domain_reg;
> > +     u32 scp_domain_value;
> > 
> >       size_t ipi_buf_offset;
> >       const struct mtk_scp_sizes_data *scp_sizes;
> > diff --git a/drivers/remoteproc/mtk_scp.c
> > b/drivers/remoteproc/mtk_scp.c
> > index 8206a1766481..956793fc6901 100644
> > --- a/drivers/remoteproc/mtk_scp.c
> > +++ b/drivers/remoteproc/mtk_scp.c
> > @@ -225,7 +225,8 @@ static void mt8192_scp_irq_handler(struct
> > mtk_scp *scp)
> >  {
> >       u32 scp_to_host;
> > 
> > -     scp_to_host = readl(scp->cluster->reg_base +
> > MT8192_SCP2APMCU_IPC_SET);
> > +     scp_to_host = readl(scp->cluster->reg_base +
> > +                         scp->data->scp_to_host_ipc_set_reg);
> 
> As far as I can tell, this is the same for both mt8189 and mt8192 -
> it should
> not be needed.
> 

Thanks, I will update it in next version patch.

> > 
> >       if (scp_to_host & MT8192_SCP_IPC_INT_BIT) {
> >               scp_ipi_handler(scp);
> > @@ -235,7 +236,7 @@ static void mt8192_scp_irq_handler(struct
> > mtk_scp *scp)
> >                * MT8192_SCP2APMCU_IPC.
> >                */
> >               writel(MT8192_SCP_IPC_INT_BIT,
> > -                    scp->cluster->reg_base +
> > MT8192_SCP2APMCU_IPC_CLR);
> > +                    scp->cluster->reg_base + scp->data-
> > >scp_to_host_ipc_clr_reg);
> >       } else {
> >               scp_wdt_handler(scp, scp_to_host);
> >               writel(1, scp->cluster->reg_base +
> > MT8192_CORE0_WDT_IRQ);
> > @@ -559,8 +560,10 @@ static int mt8188_scp_c1_before_load(struct
> > mtk_scp *scp)
> > 
> >  static int mt8192_scp_before_load(struct mtk_scp *scp)
> >  {
> > +     u32 scp2spm_ipc_clr = scp->data->scp_to_spm_ipc_clr_reg;
> > +
> >       /* clear SPM interrupt, SCP2SPM_IPC_CLR */
> > -     writel(0xff, scp->cluster->reg_base +
> > MT8192_SCP2SPM_IPC_CLR);
> > +     writel(0xff, scp->cluster->reg_base + scp2spm_ipc_clr);
> > 
> >       writel(1, scp->cluster->reg_base + MT8192_CORE0_SW_RSTN_SET);
> > 
> > @@ -574,6 +577,11 @@ static int mt8192_scp_before_load(struct
> > mtk_scp *scp)
> >       /* enable MPU for all memory regions */
> >       writel(0xff, scp->cluster->reg_base +
> > MT8192_CORE0_MEM_ATT_PREDEF);
> > 
> > +     /* set the domain of master in SCP */
> > +     if (scp->data->scp_secure_domain_reg)
> > +             writel(scp->data->scp_domain_value,
> > +                    scp->cluster->reg_base + scp->data-
> > >scp_secure_domain_reg);
> > +
> >       return 0;
> >  }
> > 
> > @@ -1464,6 +1472,24 @@ static const struct mtk_scp_of_data
> > mt8188_of_data_c1 = {
> >       .scp_sizes = &mt8188_scp_c1_sizes,
> >  };
> > 
> > +static const struct mtk_scp_of_data mt8189_of_data = {
> > +     .scp_clk_get = mt8195_scp_clk_get,
> > +     .scp_before_load = mt8192_scp_before_load,
> > +     .scp_irq_handler = mt8192_scp_irq_handler,
> > +     .scp_reset_assert = mt8192_scp_reset_assert,
> > +     .scp_reset_deassert = mt8192_scp_reset_deassert,
> > +     .scp_stop = mt8192_scp_stop,
> > +     .scp_da_to_va = mt8192_scp_da_to_va,
> > +     .host_to_scp_reg = MT8192_GIPC_IN_SET,
> > +     .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
> > +     .scp_to_host_ipc_set_reg = MT8192_SCP2APMCU_IPC_SET,
> > +     .scp_to_host_ipc_clr_reg = MT8189_SCP2APMCU_IPC_CLR,
> > +     .scp_to_spm_ipc_clr_reg = MT8189_SCP2SPM_IPC_CLR,
> > +     .scp_secure_domain_reg = MT8189_SCP_SECURE_DOMAIN,
> > +     .scp_domain_value = MT8189_SCP_DOMAIN_VAL,
> > +     .scp_sizes = &default_scp_sizes,
> > +};
> > +
> >  static const struct mtk_scp_of_data mt8192_of_data = {
> >       .scp_clk_get = mt8192_scp_clk_get,
> >       .scp_before_load = mt8192_scp_before_load,
> > @@ -1475,6 +1501,10 @@ static const struct mtk_scp_of_data
> > mt8192_of_data = {
> >       .host_to_scp_reg = MT8192_GIPC_IN_SET,
> >       .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
> >       .scp_sizes = &default_scp_sizes,
> > +     .scp_to_host_ipc_set_reg = MT8192_SCP2APMCU_IPC_SET,
> > +     .scp_to_host_ipc_clr_reg = MT8192_SCP2APMCU_IPC_CLR,
> > +     .scp_to_spm_ipc_clr_reg = MT8192_SCP2SPM_IPC_CLR,
> > +     .scp_sizes = &default_scp_sizes,
> 
> You are introducing a duplicate .scp_sizes
> 
> Thanks,
> Mathieu
> 

Thanks, I will remove the duplicate .scp_sizes in mt8192_of_data.

> >  };
> > 
> >  static const struct mtk_scp_of_data mt8195_of_data = {
> > @@ -1520,6 +1550,7 @@ static const struct of_device_id
> > mtk_scp_of_match[] = {
> >       { .compatible = "mediatek,mt8186-scp", .data =
> > &mt8186_of_data },
> >       { .compatible = "mediatek,mt8188-scp", .data =
> > &mt8188_of_data },
> >       { .compatible = "mediatek,mt8188-scp-dual", .data =
> > &mt8188_of_data_cores },
> > +     { .compatible = "mediatek,mt8189-scp", .data =
> > &mt8189_of_data },
> >       { .compatible = "mediatek,mt8192-scp", .data =
> > &mt8192_of_data },
> >       { .compatible = "mediatek,mt8195-scp", .data =
> > &mt8195_of_data },
> >       { .compatible = "mediatek,mt8195-scp-dual", .data =
> > &mt8195_of_data_cores },
> > --
> > 2.45.2
> >

[PATCH 1/3] dt-bindings: remoteproc: mediatek: Add binding for mt8189 scp
[PATCH 2/3] arm64: dts: mt8189: Add scp node
[PATCH 3/3] remoteproc: mediatek: Support MT8189 SCP