.../display/bridge/simple-bridge.yaml | 1 + .../display/rockchip/rockchip,dw-dp.yaml | 150 ++ MAINTAINERS | 8 + arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 30 + .../arm64/boot/dts/rockchip/rk3588-extra.dtsi | 30 + .../boot/dts/rockchip/rk3588-rock-5-itx.dts | 59 + .../boot/dts/rockchip/rk3588s-coolpi-4b.dts | 37 + drivers/gpu/drm/bridge/simple-bridge.c | 5 + drivers/gpu/drm/bridge/synopsys/Kconfig | 7 + drivers/gpu/drm/bridge/synopsys/Makefile | 1 + drivers/gpu/drm/bridge/synopsys/dw-dp.c | 2094 +++++++++++++++++ drivers/gpu/drm/rockchip/Kconfig | 9 + drivers/gpu/drm/rockchip/Makefile | 1 + drivers/gpu/drm/rockchip/dw_dp-rockchip.c | 150 ++ drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 1 + drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 + include/drm/bridge/dw_dp.h | 20 + 17 files changed, 2604 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml create mode 100644 drivers/gpu/drm/bridge/synopsys/dw-dp.c create mode 100644 drivers/gpu/drm/rockchip/dw_dp-rockchip.c create mode 100644 include/drm/bridge/dw_dp.h
From: Andy Yan <andy.yan@rock-chips.com> There are two DW DPTX based DisplayPort Controller on rk3588 which are compliant with the DisplayPort Specification Version 1.4 with the following features: * DisplayPort 1.4a * Main Link: 1/2/4 lanes * Main Link Support 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps * AUX channel 1Mbps * Single Stream Transport(SST) * Multistream Transport (MST) * Type-C support (alternate mode) * HDCP 2.2, HDCP 1.3 * Supports up to 8/10 bits per color component * Supports RBG, YCbCr4:4:4, YCbCr4:2:2, YCbCr4:2:0 * Pixel clock up to 594MHz * I2S, SPDIF audio interface The current version of this patch series only supports basic display outputs. I conducted tests with DP0 in 1080p and 4K@60 YCbCr4:2:0 modes; the ALT/Type-C mode was tested on Rock 5B, DP1 was tested on Rock 5 ITX by Stephen and Piotr. HDCP and audio features remain unimplemented. For RK3588, it's only support SST, while in the upcoming RK3576, it can support MST output. Changes in v6: - Use drm_dp_vsc_sdp_supported - Store bpc/bpp/color format in dw_dp_bridge_state - Collect Reviewed-by tags - Link to V5: https://lore.kernel.org/linux-rockchip/20250716100440.816351-1-andyshrk@163.com/ Changes in v5: - Use drm_dp_read_sink_count_cap instead of the private implementation. - First included in this version. - Link to V4: https://lore.kernel.org/linux-rockchip/20250619063900.700491-1-andyshrk@163.com/ Changes in v4: - Drop unnecessary header files - Switch to devm_drm_bridge_alloc - Drop unused function - Add platform_set_drvdata - Link to V3: https://lore.kernel.org/linux-rockchip/20250403033748.245007-1-andyshrk@163.com/ Changes in v3: - Rebase on drm-misc-next - Switch to common helpers to power up/down dp link - Only pass parameters to phy that should be set - First introduced in this version. - First introduced in this version. - Add RA620 into bridge chain. - Link to V2: https://lore.kernel.org/linux-rockchip/20250312104214.525242-1-andyshrk@163.com/ Changes in v2: - Fix a character encoding issue - Fix compile error when build as module - Add phy init - Only use one dw_dp_link_train_set - inline dw_dp_phy_update_vs_emph - Use dp_sdp - Check return value of drm_modeset_lock - Merge code in atomic_pre_enable/mode_fixup to atomic_check - Return NULL if can't find a supported output format - Fix max_link_rate from plat_data - no include uapi path - switch to drmm_encoder_init - Sort in alphabetical order - Link to V1: https://lore.kernel.org/linux-rockchip/20250223113036.74252-1-andyshrk@163.com/ Andy Yan (10): dt-bindings: display: rockchip: Add schema for RK3588 DPTX Controller drm/bridge: synopsys: Add DW DPTX Controller support library drm/rockchip: Add RK3588 DPTX output support MAINTAINERS: Add entry for DW DPTX Controller bridge dt-bindings: display: simple-bridge: Add ra620 compatible drm/birdge: simple-bridge: Add support for radxa ra620 arm64: dts: rockchip: Add DP0 for rk3588 arm64: dts: rockchip: Add DP1 for rk3588 arm64: dts: rockchip: Enable DisplayPort for rk3588s Cool Pi 4B arm64: dts: rockchip: Enable DP2HDMI for ROCK 5 ITX .../display/bridge/simple-bridge.yaml | 1 + .../display/rockchip/rockchip,dw-dp.yaml | 150 ++ MAINTAINERS | 8 + arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 30 + .../arm64/boot/dts/rockchip/rk3588-extra.dtsi | 30 + .../boot/dts/rockchip/rk3588-rock-5-itx.dts | 59 + .../boot/dts/rockchip/rk3588s-coolpi-4b.dts | 37 + drivers/gpu/drm/bridge/simple-bridge.c | 5 + drivers/gpu/drm/bridge/synopsys/Kconfig | 7 + drivers/gpu/drm/bridge/synopsys/Makefile | 1 + drivers/gpu/drm/bridge/synopsys/dw-dp.c | 2094 +++++++++++++++++ drivers/gpu/drm/rockchip/Kconfig | 9 + drivers/gpu/drm/rockchip/Makefile | 1 + drivers/gpu/drm/rockchip/dw_dp-rockchip.c | 150 ++ drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 1 + drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 + include/drm/bridge/dw_dp.h | 20 + 17 files changed, 2604 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml create mode 100644 drivers/gpu/drm/bridge/synopsys/dw-dp.c create mode 100644 drivers/gpu/drm/rockchip/dw_dp-rockchip.c create mode 100644 include/drm/bridge/dw_dp.h -- 2.43.0
Hello Dmitry, At 2025-07-28 16:28:25, "Andy Yan" <andyshrk@163.com> wrote: >From: Andy Yan <andy.yan@rock-chips.com> > > >There are two DW DPTX based DisplayPort Controller on rk3588 which >are compliant with the DisplayPort Specification Version 1.4 with >the following features: > >* DisplayPort 1.4a >* Main Link: 1/2/4 lanes >* Main Link Support 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps >* AUX channel 1Mbps >* Single Stream Transport(SST) >* Multistream Transport (MST) >* Type-C support (alternate mode) >* HDCP 2.2, HDCP 1.3 >* Supports up to 8/10 bits per color component >* Supports RBG, YCbCr4:4:4, YCbCr4:2:2, YCbCr4:2:0 >* Pixel clock up to 594MHz >* I2S, SPDIF audio interface > >The current version of this patch series only supports basic display outputs. >I conducted tests with DP0 in 1080p and 4K@60 YCbCr4:2:0 modes; the ALT/Type-C >mode was tested on Rock 5B, DP1 was tested on Rock 5 ITX by Stephen and Piotr. >HDCP and audio features remain unimplemented. >For RK3588, it's only support SST, while in the upcoming RK3576, it can support >MST output. Could you take this series? It would be nice if they could land Linux 6.18. > > >Changes in v6: >- Use drm_dp_vsc_sdp_supported >- Store bpc/bpp/color format in dw_dp_bridge_state >- Collect Reviewed-by tags >- Link to V5: https://lore.kernel.org/linux-rockchip/20250716100440.816351-1-andyshrk@163.com/ > >Changes in v5: >- Use drm_dp_read_sink_count_cap instead of the private implementation. >- First included in this version. >- Link to V4: https://lore.kernel.org/linux-rockchip/20250619063900.700491-1-andyshrk@163.com/ > >Changes in v4: >- Drop unnecessary header files >- Switch to devm_drm_bridge_alloc >- Drop unused function >- Add platform_set_drvdata >- Link to V3: https://lore.kernel.org/linux-rockchip/20250403033748.245007-1-andyshrk@163.com/ > > >Changes in v3: >- Rebase on drm-misc-next >- Switch to common helpers to power up/down dp link >- Only pass parameters to phy that should be set >- First introduced in this version. >- First introduced in this version. >- Add RA620 into bridge chain. >- Link to V2: https://lore.kernel.org/linux-rockchip/20250312104214.525242-1-andyshrk@163.com/ > >Changes in v2: >- Fix a character encoding issue >- Fix compile error when build as module >- Add phy init >- Only use one dw_dp_link_train_set >- inline dw_dp_phy_update_vs_emph >- Use dp_sdp >- Check return value of drm_modeset_lock >- Merge code in atomic_pre_enable/mode_fixup to atomic_check >- Return NULL if can't find a supported output format >- Fix max_link_rate from plat_data >- no include uapi path >- switch to drmm_encoder_init >- Sort in alphabetical order >- Link to V1: https://lore.kernel.org/linux-rockchip/20250223113036.74252-1-andyshrk@163.com/ > >Andy Yan (10): > dt-bindings: display: rockchip: Add schema for RK3588 DPTX Controller > drm/bridge: synopsys: Add DW DPTX Controller support library > drm/rockchip: Add RK3588 DPTX output support > MAINTAINERS: Add entry for DW DPTX Controller bridge > dt-bindings: display: simple-bridge: Add ra620 compatible > drm/birdge: simple-bridge: Add support for radxa ra620 > arm64: dts: rockchip: Add DP0 for rk3588 > arm64: dts: rockchip: Add DP1 for rk3588 > arm64: dts: rockchip: Enable DisplayPort for rk3588s Cool Pi 4B > arm64: dts: rockchip: Enable DP2HDMI for ROCK 5 ITX > > .../display/bridge/simple-bridge.yaml | 1 + > .../display/rockchip/rockchip,dw-dp.yaml | 150 ++ > MAINTAINERS | 8 + > arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 30 + > .../arm64/boot/dts/rockchip/rk3588-extra.dtsi | 30 + > .../boot/dts/rockchip/rk3588-rock-5-itx.dts | 59 + > .../boot/dts/rockchip/rk3588s-coolpi-4b.dts | 37 + > drivers/gpu/drm/bridge/simple-bridge.c | 5 + > drivers/gpu/drm/bridge/synopsys/Kconfig | 7 + > drivers/gpu/drm/bridge/synopsys/Makefile | 1 + > drivers/gpu/drm/bridge/synopsys/dw-dp.c | 2094 +++++++++++++++++ > drivers/gpu/drm/rockchip/Kconfig | 9 + > drivers/gpu/drm/rockchip/Makefile | 1 + > drivers/gpu/drm/rockchip/dw_dp-rockchip.c | 150 ++ > drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 1 + > drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 + > include/drm/bridge/dw_dp.h | 20 + > 17 files changed, 2604 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml > create mode 100644 drivers/gpu/drm/bridge/synopsys/dw-dp.c > create mode 100644 drivers/gpu/drm/rockchip/dw_dp-rockchip.c > create mode 100644 include/drm/bridge/dw_dp.h > >-- >2.43.0 >
On Thu, Aug 21, 2025 at 06:44:21PM +0800, Andy Yan wrote: > > > Hello Dmitry, > > > At 2025-07-28 16:28:25, "Andy Yan" <andyshrk@163.com> wrote: > >From: Andy Yan <andy.yan@rock-chips.com> > > > > > >There are two DW DPTX based DisplayPort Controller on rk3588 which > >are compliant with the DisplayPort Specification Version 1.4 with > >the following features: > > > >* DisplayPort 1.4a > >* Main Link: 1/2/4 lanes > >* Main Link Support 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps > >* AUX channel 1Mbps > >* Single Stream Transport(SST) > >* Multistream Transport (MST) > >* Type-C support (alternate mode) > >* HDCP 2.2, HDCP 1.3 > >* Supports up to 8/10 bits per color component > >* Supports RBG, YCbCr4:4:4, YCbCr4:2:2, YCbCr4:2:0 > >* Pixel clock up to 594MHz > >* I2S, SPDIF audio interface > > > >The current version of this patch series only supports basic display outputs. > >I conducted tests with DP0 in 1080p and 4K@60 YCbCr4:2:0 modes; the ALT/Type-C > >mode was tested on Rock 5B, DP1 was tested on Rock 5 ITX by Stephen and Piotr. > >HDCP and audio features remain unimplemented. > >For RK3588, it's only support SST, while in the upcoming RK3576, it can support > >MST output. > > > > Could you take this series? It would be nice if they could land Linux 6.18. dim checkpatch complains about the DW library patch: -:385: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment #385: FILE: drivers/gpu/drm/bridge/synopsys/dw-dp.c:323: + struct mutex irq_lock; -:819: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'v != adj->voltage_swing[i]' #819: FILE: drivers/gpu/drm/bridge/synopsys/dw-dp.c:757: + if ((v != adj->voltage_swing[i]) || (p != adj->pre_emphasis[i])) -:819: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'p != adj->pre_emphasis[i]' #819: FILE: drivers/gpu/drm/bridge/synopsys/dw-dp.c:757: + if ((v != adj->voltage_swing[i]) || (p != adj->pre_emphasis[i])) -:1754: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see function description of usleep_range() and udelay(). #1754: FILE: drivers/gpu/drm/bridge/synopsys/dw-dp.c:1692: + udelay(10); Could you please take a look and fix those? > > > > > > > >Changes in v6: > >- Use drm_dp_vsc_sdp_supported > >- Store bpc/bpp/color format in dw_dp_bridge_state > >- Collect Reviewed-by tags > >- Link to V5: https://lore.kernel.org/linux-rockchip/20250716100440.816351-1-andyshrk@163.com/ > > > >Changes in v5: > >- Use drm_dp_read_sink_count_cap instead of the private implementation. > >- First included in this version. > >- Link to V4: https://lore.kernel.org/linux-rockchip/20250619063900.700491-1-andyshrk@163.com/ > > > >Changes in v4: > >- Drop unnecessary header files > >- Switch to devm_drm_bridge_alloc > >- Drop unused function > >- Add platform_set_drvdata > >- Link to V3: https://lore.kernel.org/linux-rockchip/20250403033748.245007-1-andyshrk@163.com/ > > > > > >Changes in v3: > >- Rebase on drm-misc-next > >- Switch to common helpers to power up/down dp link > >- Only pass parameters to phy that should be set > >- First introduced in this version. > >- First introduced in this version. > >- Add RA620 into bridge chain. > >- Link to V2: https://lore.kernel.org/linux-rockchip/20250312104214.525242-1-andyshrk@163.com/ > > > >Changes in v2: > >- Fix a character encoding issue > >- Fix compile error when build as module > >- Add phy init > >- Only use one dw_dp_link_train_set > >- inline dw_dp_phy_update_vs_emph > >- Use dp_sdp > >- Check return value of drm_modeset_lock > >- Merge code in atomic_pre_enable/mode_fixup to atomic_check > >- Return NULL if can't find a supported output format > >- Fix max_link_rate from plat_data > >- no include uapi path > >- switch to drmm_encoder_init > >- Sort in alphabetical order > >- Link to V1: https://lore.kernel.org/linux-rockchip/20250223113036.74252-1-andyshrk@163.com/ > > > >Andy Yan (10): > > dt-bindings: display: rockchip: Add schema for RK3588 DPTX Controller > > drm/bridge: synopsys: Add DW DPTX Controller support library > > drm/rockchip: Add RK3588 DPTX output support > > MAINTAINERS: Add entry for DW DPTX Controller bridge > > dt-bindings: display: simple-bridge: Add ra620 compatible > > drm/birdge: simple-bridge: Add support for radxa ra620 > > arm64: dts: rockchip: Add DP0 for rk3588 > > arm64: dts: rockchip: Add DP1 for rk3588 > > arm64: dts: rockchip: Enable DisplayPort for rk3588s Cool Pi 4B > > arm64: dts: rockchip: Enable DP2HDMI for ROCK 5 ITX > > > > .../display/bridge/simple-bridge.yaml | 1 + > > .../display/rockchip/rockchip,dw-dp.yaml | 150 ++ > > MAINTAINERS | 8 + > > arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 30 + > > .../arm64/boot/dts/rockchip/rk3588-extra.dtsi | 30 + > > .../boot/dts/rockchip/rk3588-rock-5-itx.dts | 59 + > > .../boot/dts/rockchip/rk3588s-coolpi-4b.dts | 37 + > > drivers/gpu/drm/bridge/simple-bridge.c | 5 + > > drivers/gpu/drm/bridge/synopsys/Kconfig | 7 + > > drivers/gpu/drm/bridge/synopsys/Makefile | 1 + > > drivers/gpu/drm/bridge/synopsys/dw-dp.c | 2094 +++++++++++++++++ > > drivers/gpu/drm/rockchip/Kconfig | 9 + > > drivers/gpu/drm/rockchip/Makefile | 1 + > > drivers/gpu/drm/rockchip/dw_dp-rockchip.c | 150 ++ > > drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 1 + > > drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 + > > include/drm/bridge/dw_dp.h | 20 + > > 17 files changed, 2604 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml > > create mode 100644 drivers/gpu/drm/bridge/synopsys/dw-dp.c > > create mode 100644 drivers/gpu/drm/rockchip/dw_dp-rockchip.c > > create mode 100644 include/drm/bridge/dw_dp.h > > > >-- > >2.43.0 > > -- With best wishes Dmitry
Hello Dmitry, At 2025-08-21 19:36:01, "Dmitry Baryshkov" <dmitry.baryshkov@oss.qualcomm.com> wrote: >On Thu, Aug 21, 2025 at 06:44:21PM +0800, Andy Yan wrote: >> >> >> Hello Dmitry, >> >> >> At 2025-07-28 16:28:25, "Andy Yan" <andyshrk@163.com> wrote: >> >From: Andy Yan <andy.yan@rock-chips.com> >> > >> > >> >There are two DW DPTX based DisplayPort Controller on rk3588 which >> >are compliant with the DisplayPort Specification Version 1.4 with >> >the following features: >> > >> >* DisplayPort 1.4a >> >* Main Link: 1/2/4 lanes >> >* Main Link Support 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps >> >* AUX channel 1Mbps >> >* Single Stream Transport(SST) >> >* Multistream Transport (MST) >> >* Type-C support (alternate mode) >> >* HDCP 2.2, HDCP 1.3 >> >* Supports up to 8/10 bits per color component >> >* Supports RBG, YCbCr4:4:4, YCbCr4:2:2, YCbCr4:2:0 >> >* Pixel clock up to 594MHz >> >* I2S, SPDIF audio interface >> > >> >The current version of this patch series only supports basic display outputs. >> >I conducted tests with DP0 in 1080p and 4K@60 YCbCr4:2:0 modes; the ALT/Type-C >> >mode was tested on Rock 5B, DP1 was tested on Rock 5 ITX by Stephen and Piotr. >> >HDCP and audio features remain unimplemented. >> >For RK3588, it's only support SST, while in the upcoming RK3576, it can support >> >MST output. >> >> >> >> Could you take this series? It would be nice if they could land Linux 6.18. > >dim checkpatch complains about the DW library patch: > > >-:385: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment >#385: FILE: drivers/gpu/drm/bridge/synopsys/dw-dp.c:323: >+ struct mutex irq_lock; > >-:819: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'v != adj->voltage_swing[i]' >#819: FILE: drivers/gpu/drm/bridge/synopsys/dw-dp.c:757: >+ if ((v != adj->voltage_swing[i]) || (p != adj->pre_emphasis[i])) > >-:819: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'p != adj->pre_emphasis[i]' >#819: FILE: drivers/gpu/drm/bridge/synopsys/dw-dp.c:757: >+ if ((v != adj->voltage_swing[i]) || (p != adj->pre_emphasis[i])) > >-:1754: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see function description of usleep_range() and udelay(). >#1754: FILE: drivers/gpu/drm/bridge/synopsys/dw-dp.c:1692: >+ udelay(10); > >Could you please take a look and fix those? Sorry, these issues have been fixed in version V7[0]. [0]https://lore.kernel.org/dri-devel/20250822063959.692098-1-andyshrk@163.com/T/#t > >> >> >> > >> > >> >Changes in v6: >> >- Use drm_dp_vsc_sdp_supported >> >- Store bpc/bpp/color format in dw_dp_bridge_state >> >- Collect Reviewed-by tags >> >- Link to V5: https://lore.kernel.org/linux-rockchip/20250716100440.816351-1-andyshrk@163.com/ >> > >> >Changes in v5: >> >- Use drm_dp_read_sink_count_cap instead of the private implementation. >> >- First included in this version. >> >- Link to V4: https://lore.kernel.org/linux-rockchip/20250619063900.700491-1-andyshrk@163.com/ >> > >> >Changes in v4: >> >- Drop unnecessary header files >> >- Switch to devm_drm_bridge_alloc >> >- Drop unused function >> >- Add platform_set_drvdata >> >- Link to V3: https://lore.kernel.org/linux-rockchip/20250403033748.245007-1-andyshrk@163.com/ >> > >> > >> >Changes in v3: >> >- Rebase on drm-misc-next >> >- Switch to common helpers to power up/down dp link >> >- Only pass parameters to phy that should be set >> >- First introduced in this version. >> >- First introduced in this version. >> >- Add RA620 into bridge chain. >> >- Link to V2: https://lore.kernel.org/linux-rockchip/20250312104214.525242-1-andyshrk@163.com/ >> > >> >Changes in v2: >> >- Fix a character encoding issue >> >- Fix compile error when build as module >> >- Add phy init >> >- Only use one dw_dp_link_train_set >> >- inline dw_dp_phy_update_vs_emph >> >- Use dp_sdp >> >- Check return value of drm_modeset_lock >> >- Merge code in atomic_pre_enable/mode_fixup to atomic_check >> >- Return NULL if can't find a supported output format >> >- Fix max_link_rate from plat_data >> >- no include uapi path >> >- switch to drmm_encoder_init >> >- Sort in alphabetical order >> >- Link to V1: https://lore.kernel.org/linux-rockchip/20250223113036.74252-1-andyshrk@163.com/ >> > >> >Andy Yan (10): >> > dt-bindings: display: rockchip: Add schema for RK3588 DPTX Controller >> > drm/bridge: synopsys: Add DW DPTX Controller support library >> > drm/rockchip: Add RK3588 DPTX output support >> > MAINTAINERS: Add entry for DW DPTX Controller bridge >> > dt-bindings: display: simple-bridge: Add ra620 compatible >> > drm/birdge: simple-bridge: Add support for radxa ra620 >> > arm64: dts: rockchip: Add DP0 for rk3588 >> > arm64: dts: rockchip: Add DP1 for rk3588 >> > arm64: dts: rockchip: Enable DisplayPort for rk3588s Cool Pi 4B >> > arm64: dts: rockchip: Enable DP2HDMI for ROCK 5 ITX >> > >> > .../display/bridge/simple-bridge.yaml | 1 + >> > .../display/rockchip/rockchip,dw-dp.yaml | 150 ++ >> > MAINTAINERS | 8 + >> > arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 30 + >> > .../arm64/boot/dts/rockchip/rk3588-extra.dtsi | 30 + >> > .../boot/dts/rockchip/rk3588-rock-5-itx.dts | 59 + >> > .../boot/dts/rockchip/rk3588s-coolpi-4b.dts | 37 + >> > drivers/gpu/drm/bridge/simple-bridge.c | 5 + >> > drivers/gpu/drm/bridge/synopsys/Kconfig | 7 + >> > drivers/gpu/drm/bridge/synopsys/Makefile | 1 + >> > drivers/gpu/drm/bridge/synopsys/dw-dp.c | 2094 +++++++++++++++++ >> > drivers/gpu/drm/rockchip/Kconfig | 9 + >> > drivers/gpu/drm/rockchip/Makefile | 1 + >> > drivers/gpu/drm/rockchip/dw_dp-rockchip.c | 150 ++ >> > drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 1 + >> > drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 + >> > include/drm/bridge/dw_dp.h | 20 + >> > 17 files changed, 2604 insertions(+) >> > create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml >> > create mode 100644 drivers/gpu/drm/bridge/synopsys/dw-dp.c >> > create mode 100644 drivers/gpu/drm/rockchip/dw_dp-rockchip.c >> > create mode 100644 include/drm/bridge/dw_dp.h >> > >> >-- >> >2.43.0 >> > > >-- >With best wishes >Dmitry
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