[PATCH 1/3] arm64: dts: rockchip: Add SFC node for RK3528

Jonas Karlman posted 3 patches 2 months, 1 week ago
[PATCH 1/3] arm64: dts: rockchip: Add SFC node for RK3528
Posted by Jonas Karlman 2 months, 1 week ago
The Flexible Serial Flash Interface (FSPI) controller in Rockchip RK3528
is similar to the one included in e.g. RK3568 and RK3588.

Add device tree node for the Flexible Serial Flash Interface (FSPI)
controller in RK3528.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm64/boot/dts/rockchip/rk3528.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
index 3e51a3f51e05..49886a4b58f1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
@@ -1077,6 +1077,18 @@ sdhci: mmc@ffbf0000 {
 			status = "disabled";
 		};
 
+		sfc: spi@ffc00000 {
+			compatible = "rockchip,sfc";
+			reg = <0x0 0xffc00000 0x0 0x4000>;
+			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+			clock-names = "clk_sfc", "hclk_sfc";
+			power-domains = <&power RK3528_PD_VPU>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		sdio0: mmc@ffc10000 {
 			compatible = "rockchip,rk3528-dw-mshc",
 				     "rockchip,rk3288-dw-mshc";
-- 
2.50.1
Re: [PATCH 1/3] arm64: dts: rockchip: Add SFC node for RK3528
Posted by Chukun Pan 2 months, 1 week ago
Hi,

> +		sfc: spi@ffc00000 {
> +			compatible = "rockchip,sfc";
> +			reg = <0x0 0xffc00000 0x0 0x4000>;
> +			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
> +			clock-names = "clk_sfc", "hclk_sfc";

The clock* should be placed before interrupts.
BTW, doesn't the sfc node need to configure pinctrl?

Thanks,
Chukun

--
2.25.1
Re: [PATCH 1/3] arm64: dts: rockchip: Add SFC node for RK3528
Posted by Jonas Karlman 2 months, 1 week ago
Hi Chukun,

On 7/28/2025 9:00 AM, Chukun Pan wrote:
> Hi,
> 
>> +		sfc: spi@ffc00000 {
>> +			compatible = "rockchip,sfc";
>> +			reg = <0x0 0xffc00000 0x0 0x4000>;
>> +			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
>> +			clock-names = "clk_sfc", "hclk_sfc";
> 
> The clock* should be placed before interrupts.

Thanks for catching this, will fix in v2.

> BTW, doesn't the sfc node need to configure pinctrl?

Not sure if it make sense to have a default here. fspi_pins is most
likely always used, however fspi_csn0 and/or fspi_csn1 is probably board
specific.

On the Radxa E24C only fspi_csn0 and fspi_pins are used.

Regards,
Jonas

> 
> Thanks,
> Chukun
> 
> --
> 2.25.1
> 
>