The gpio controller on some bcm63xx SoCs has a register for
controlling functionality of the internal fast ethernet phys.
These patches allow the b53 driver to enable/disable phy
power.

The register also contains reset bits which will be set by
a reset driver in another patch series:
https://lore.kernel.org/all/20250715234605.36216-1-kylehendrydev@gmail.com/

v2 changes:
- Add more description to dt binding
- Squash commit adding syscon lookup into where the result is checked

v1: https://lore.kernel.org/netdev/20250716002922.230807-1-kylehendrydev@gmail.com/

Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>

Kyle Hendry (7):
  net: dsa: b53: Add phy_enable(), phy_disable() methods
  dt-bindings: net: dsa: b53: Document brcm,gpio-ctrl property
  net: dsa: b53: Define chip IDs for more bcm63xx SoCs
  net: dsa: b53: mmap: Add syscon reference and register layout for
    bcm63268
  net: dsa: b53: mmap: Add register layout for bcm6318
  net: dsa: b53: mmap: Add register layout for bcm6368
  net: dsa: b53: mmap: Implement bcm63xx ephy power control

 .../devicetree/bindings/net/dsa/brcm,b53.yaml |   6 +
 drivers/net/dsa/b53/b53_common.c              |  27 ++---
 drivers/net/dsa/b53/b53_mmap.c                | 107 +++++++++++++++++-
 drivers/net/dsa/b53/b53_priv.h                |  15 ++-
 4 files changed, 134 insertions(+), 21 deletions(-)

-- 
2.43.0