From: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Make use of audioreach-audio.dtsi and remove the gpr nodes from SoC dtsi.
This move removes duplication.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm8650-audio.dtsi | 10 +++++
arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 1 +
arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 1 +
arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 1 +
arch/arm64/boot/dts/qcom/sm8650.dtsi | 43 ++--------------------
5 files changed, 16 insertions(+), 40 deletions(-)
create mode 100644 arch/arm64/boot/dts/qcom/sm8650-audio.dtsi
diff --git a/arch/arm64/boot/dts/qcom/sm8650-audio.dtsi b/arch/arm64/boot/dts/qcom/sm8650-audio.dtsi
new file mode 100644
index 000000000000..14ae50e72e4b
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm8650-audio.dtsi
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+#include "audioreach-audio.dtsi"
+
+&q6apmdai{
+ iommus = <&apps_smmu 0x1001 0x80>,
+ <&apps_smmu 0x1061 0x0>;
+};
diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
index 259649d7dcd7..94fa52437d79 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
@@ -8,6 +8,7 @@
#include <dt-bindings/leds/common.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sm8650.dtsi"
+#include "sm8650-audio.dtsi"
#include "pm8010.dtsi"
#include "pm8550.dtsi"
#include "pm8550b.dtsi"
diff --git a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
index 8a957adbfb38..07e62918422e 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
@@ -7,6 +7,7 @@
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sm8650.dtsi"
+#include "sm8650-audio.dtsi"
#include "pm8010.dtsi"
#include "pm8550.dtsi"
#include "pm8550b.dtsi"
diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
index 7552d5d3fb40..7f26095e6f07 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
@@ -8,6 +8,7 @@
#include <dt-bindings/leds/common.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sm8650.dtsi"
+#include "sm8650-audio.dtsi"
#include "pm8010.dtsi"
#include "pm8550.dtsi"
#include "pm8550b.dtsi"
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index e14d3d778b71..5212000bf34c 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -23,7 +23,6 @@
#include <dt-bindings/power/qcom,rpmhpd.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/reset/qcom,sm8650-gpucc.h>
-#include <dt-bindings/soc/qcom,gpr.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
#include <dt-bindings/thermal/thermal.h>
@@ -4447,6 +4446,9 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
label = "lpass";
+ gpr: gpr {
+ };
+
fastrpc {
compatible = "qcom,fastrpc";
@@ -4506,45 +4508,6 @@ compute-cb@7 {
};
};
- gpr {
- compatible = "qcom,gpr";
- qcom,glink-channels = "adsp_apps";
- qcom,domain = <GPR_DOMAIN_ID_ADSP>;
- qcom,intents = <512 20>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- q6apm: service@1 {
- compatible = "qcom,q6apm";
- reg = <GPR_APM_MODULE_IID>;
- #sound-dai-cells = <0>;
- qcom,protection-domain = "avs/audio",
- "msm/adsp/audio_pd";
-
- q6apmbedai: bedais {
- compatible = "qcom,q6apm-lpass-dais";
- #sound-dai-cells = <1>;
- };
-
- q6apmdai: dais {
- compatible = "qcom,q6apm-dais";
- iommus = <&apps_smmu 0x1001 0x80>,
- <&apps_smmu 0x1061 0x0>;
- };
- };
-
- q6prm: service@2 {
- compatible = "qcom,q6prm";
- reg = <GPR_PRM_MODULE_IID>;
- qcom,protection-domain = "avs/audio",
- "msm/adsp/audio_pd";
-
- q6prmcc: clock-controller {
- compatible = "qcom,q6prm-lpass-clocks";
- #clock-cells = <2>;
- };
- };
- };
};
};
--
2.50.0On 24/07/2025 00:27, srinivas.kandagatla@oss.qualcomm.com wrote:
> From: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
>
> Make use of audioreach-audio.dtsi and remove the gpr nodes from SoC dtsi.
> This move removes duplication.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/sm8650-audio.dtsi | 10 +++++
> arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 1 +
> arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 1 +
> arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 1 +
> arch/arm64/boot/dts/qcom/sm8650.dtsi | 43 ++--------------------
> 5 files changed, 16 insertions(+), 40 deletions(-)
> create mode 100644 arch/arm64/boot/dts/qcom/sm8650-audio.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8650-audio.dtsi b/arch/arm64/boot/dts/qcom/sm8650-audio.dtsi
> new file mode 100644
> index 000000000000..14ae50e72e4b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm8650-audio.dtsi
> @@ -0,0 +1,10 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +#include "audioreach-audio.dtsi"
> +
> +&q6apmdai{
> + iommus = <&apps_smmu 0x1001 0x80>,
> + <&apps_smmu 0x1061 0x0>;
As patch 1 comment, I'm not fan either of this intermediate dtsi, or perhaps there's
some bigger plans for those files ?
Anyway per-se, it's not necessary and it should be in the SoC dtsi.
Thanks,
Neil
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
> index 259649d7dcd7..94fa52437d79 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
> @@ -8,6 +8,7 @@
> #include <dt-bindings/leds/common.h>
> #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> #include "sm8650.dtsi"
> +#include "sm8650-audio.dtsi"
> #include "pm8010.dtsi"
> #include "pm8550.dtsi"
> #include "pm8550b.dtsi"
> diff --git a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
> index 8a957adbfb38..07e62918422e 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
> @@ -7,6 +7,7 @@
>
> #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> #include "sm8650.dtsi"
> +#include "sm8650-audio.dtsi"
> #include "pm8010.dtsi"
> #include "pm8550.dtsi"
> #include "pm8550b.dtsi"
> diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> index 7552d5d3fb40..7f26095e6f07 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> @@ -8,6 +8,7 @@
> #include <dt-bindings/leds/common.h>
> #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> #include "sm8650.dtsi"
> +#include "sm8650-audio.dtsi"
> #include "pm8010.dtsi"
> #include "pm8550.dtsi"
> #include "pm8550b.dtsi"
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index e14d3d778b71..5212000bf34c 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -23,7 +23,6 @@
> #include <dt-bindings/power/qcom,rpmhpd.h>
> #include <dt-bindings/power/qcom-rpmpd.h>
> #include <dt-bindings/reset/qcom,sm8650-gpucc.h>
> -#include <dt-bindings/soc/qcom,gpr.h>
> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
> #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
> #include <dt-bindings/thermal/thermal.h>
> @@ -4447,6 +4446,9 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
>
> label = "lpass";
>
> + gpr: gpr {
> + };
> +
> fastrpc {
> compatible = "qcom,fastrpc";
>
> @@ -4506,45 +4508,6 @@ compute-cb@7 {
> };
> };
>
> - gpr {
> - compatible = "qcom,gpr";
> - qcom,glink-channels = "adsp_apps";
> - qcom,domain = <GPR_DOMAIN_ID_ADSP>;
> - qcom,intents = <512 20>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - q6apm: service@1 {
> - compatible = "qcom,q6apm";
> - reg = <GPR_APM_MODULE_IID>;
> - #sound-dai-cells = <0>;
> - qcom,protection-domain = "avs/audio",
> - "msm/adsp/audio_pd";
> -
> - q6apmbedai: bedais {
> - compatible = "qcom,q6apm-lpass-dais";
> - #sound-dai-cells = <1>;
> - };
> -
> - q6apmdai: dais {
> - compatible = "qcom,q6apm-dais";
> - iommus = <&apps_smmu 0x1001 0x80>,
> - <&apps_smmu 0x1061 0x0>;
> - };
> - };
> -
> - q6prm: service@2 {
> - compatible = "qcom,q6prm";
> - reg = <GPR_PRM_MODULE_IID>;
> - qcom,protection-domain = "avs/audio",
> - "msm/adsp/audio_pd";
> -
> - q6prmcc: clock-controller {
> - compatible = "qcom,q6prm-lpass-clocks";
> - #clock-cells = <2>;
> - };
> - };
> - };
> };
> };
>
On 7/24/25 9:26 AM, neil.armstrong@linaro.org wrote:
> On 24/07/2025 00:27, srinivas.kandagatla@oss.qualcomm.com wrote:
>> From: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
>>
>> Make use of audioreach-audio.dtsi and remove the gpr nodes from SoC dtsi.
>> This move removes duplication.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
>> ---
>> arch/arm64/boot/dts/qcom/sm8650-audio.dtsi | 10 +++++
>> arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 1 +
>> arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 1 +
>> arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 1 +
>> arch/arm64/boot/dts/qcom/sm8650.dtsi | 43 ++--------------------
>> 5 files changed, 16 insertions(+), 40 deletions(-)
>> create mode 100644 arch/arm64/boot/dts/qcom/sm8650-audio.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8650-audio.dtsi b/arch/arm64/
>> boot/dts/qcom/sm8650-audio.dtsi
>> new file mode 100644
>> index 000000000000..14ae50e72e4b
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/sm8650-audio.dtsi
>> @@ -0,0 +1,10 @@
>> +// SPDX-License-Identifier: BSD-3-Clause
>> +/*
>> + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights
>> reserved.
>> + */
>> +#include "audioreach-audio.dtsi"
>> +
>> +&q6apmdai{
>> + iommus = <&apps_smmu 0x1001 0x80>,
>> + <&apps_smmu 0x1061 0x0>;
>
> As patch 1 comment, I'm not fan either of this intermediate dtsi, or
> perhaps there's
> some bigger plans for those files ?
Thanks Neil,
It more of duplicating the same thing over and over and i expect them to
consistent across all the SoCs, however its not the case, some of stuff
that needs to be in board level dts is now added into SoC level dtsi..
Moving to intermediate dtsi could avoid things like this.
>
> Anyway per-se, it's not necessary and it should be in the SoC dtsi.
Will give that a go with some inline include in SoC dtsi.
>
> Thanks,
> Neil
>
>> +};
>> diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts b/arch/arm64/
>> boot/dts/qcom/sm8650-hdk.dts
>> index 259649d7dcd7..94fa52437d79 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
>> +++ b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
>> @@ -8,6 +8,7 @@
>> #include <dt-bindings/leds/common.h>
>> #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
>> #include "sm8650.dtsi"
>> +#include "sm8650-audio.dtsi"
>> #include "pm8010.dtsi"
>> #include "pm8550.dtsi"
>> #include "pm8550b.dtsi"
>> diff --git a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts b/arch/arm64/
>> boot/dts/qcom/sm8650-mtp.dts
>> index 8a957adbfb38..07e62918422e 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
>> +++ b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
>> @@ -7,6 +7,7 @@
>> #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
>> #include "sm8650.dtsi"
>> +#include "sm8650-audio.dtsi"
>> #include "pm8010.dtsi"
>> #include "pm8550.dtsi"
>> #include "pm8550b.dtsi"
>> diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/
>> boot/dts/qcom/sm8650-qrd.dts
>> index 7552d5d3fb40..7f26095e6f07 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
>> +++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
>> @@ -8,6 +8,7 @@
>> #include <dt-bindings/leds/common.h>
>> #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
>> #include "sm8650.dtsi"
>> +#include "sm8650-audio.dtsi"
>> #include "pm8010.dtsi"
>> #include "pm8550.dtsi"
>> #include "pm8550b.dtsi"
>> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/
>> dts/qcom/sm8650.dtsi
>> index e14d3d778b71..5212000bf34c 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>> @@ -23,7 +23,6 @@
>> #include <dt-bindings/power/qcom,rpmhpd.h>
>> #include <dt-bindings/power/qcom-rpmpd.h>
>> #include <dt-bindings/reset/qcom,sm8650-gpucc.h>
>> -#include <dt-bindings/soc/qcom,gpr.h>
>> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>> #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
>> #include <dt-bindings/thermal/thermal.h>
>> @@ -4447,6 +4446,9 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
>> label = "lpass";
>> + gpr: gpr {
>> + };
>> +
>> fastrpc {
>> compatible = "qcom,fastrpc";
>> @@ -4506,45 +4508,6 @@ compute-cb@7 {
>> };
>> };
>> - gpr {
>> - compatible = "qcom,gpr";
>> - qcom,glink-channels = "adsp_apps";
>> - qcom,domain = <GPR_DOMAIN_ID_ADSP>;
>> - qcom,intents = <512 20>;
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> -
>> - q6apm: service@1 {
>> - compatible = "qcom,q6apm";
>> - reg = <GPR_APM_MODULE_IID>;
>> - #sound-dai-cells = <0>;
>> - qcom,protection-domain = "avs/audio",
>> - "msm/adsp/audio_pd";
>> -
>> - q6apmbedai: bedais {
>> - compatible = "qcom,q6apm-lpass-dais";
>> - #sound-dai-cells = <1>;
>> - };
>> -
>> - q6apmdai: dais {
>> - compatible = "qcom,q6apm-dais";
>> - iommus = <&apps_smmu 0x1001 0x80>,
>> - <&apps_smmu 0x1061 0x0>;
>> - };
>> - };
>> -
>> - q6prm: service@2 {
>> - compatible = "qcom,q6prm";
>> - reg = <GPR_PRM_MODULE_IID>;
>> - qcom,protection-domain = "avs/audio",
>> - "msm/adsp/audio_pd";
>> -
>> - q6prmcc: clock-controller {
>> - compatible = "qcom,q6prm-lpass-clocks";
>> - #clock-cells = <2>;
>> - };
>> - };
>> - };
>> };
>> };
>>
>
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