The Rockchip RK3528 support multiple power domains, one PD_GPU that can
fully be powered down, and other that can be idle requested.
Vendor kernel flag all power domains on RK3528 as always-on, this takes
a different route and instead tries to describe all devices power-domain
in the device tree, even for controllers with unsupported runtime status.
The PD_RKVDEC is used by RKVDEC and DDRPHY CRU, and is kept disabled to
prevent a full system reset when trying to read current rate of the
SCMI_CLK_DDR clock.
pm_genpd_summary on a Radxa E20C after this:
domain status children performance
/device runtime status managed by
------------------------------------------------------------------------------
vpu on 0
ffaf0000.gpio unsupported 0 SW
ffb10000.gpio unsupported 0 SW
ffbe0000.ethernet active 0 SW
ffae0000.adc unsupported 0 SW
ffbf0000.mmc suspended 0 SW
vo on 0
ffb00000.gpio unsupported 0 SW
ffc30000.mmc suspended 0 SW
venc on 0
ffb20000.gpio unsupported 0 SW
ffa58000.i2c unsupported 0 SW
gpu off-0 0
ff700000.gpu suspended 0 SW
Changes in v2:
- Drop already applied patches
- Add snps-dw-apb-uart dt-bindings patch
- Update commit messages
This series depend on the patch "arm64: dts: rockchip: convert rk3528
power-domains to dt-binding constants" [1] for a clean apply.
[1] https://lore.kernel.org/r/20250620201715.1572609-1-heiko@sntech.de
Jonas Karlman (5):
dt-bindings: gpio: rockchip: Allow use of a power-domain
dt-bindings: i2c: i2c-rk3x: Allow use of a power-domain
dt-bindings: iio: adc: rockchip-saradc: Allow use of a power-domain
dt-bindings: serial: snps-dw-apb-uart: Allow use of a power-domain
arm64: dts: rockchip: Enable more power domains for RK3528
.../bindings/gpio/rockchip,gpio-bank.yaml | 3 ++
.../devicetree/bindings/i2c/i2c-rk3x.yaml | 3 ++
.../bindings/iio/adc/rockchip-saradc.yaml | 3 ++
.../bindings/serial/snps-dw-apb-uart.yaml | 3 ++
arch/arm64/boot/dts/rockchip/rk3528.dtsi | 30 +++++++++++++++++--
5 files changed, 39 insertions(+), 3 deletions(-)
--
2.50.1