[PATCH RFC 07/10] riscv: Add Anlogic SoC famly Kconfig support

Junhui Liu posted 10 patches 2 months, 2 weeks ago
There is a newer version of this series
[PATCH RFC 07/10] riscv: Add Anlogic SoC famly Kconfig support
Posted by Junhui Liu 2 months, 2 weeks ago
The first SoC in the Anlogic series is DR1V90, which contains a RISC-V
core from Nuclei.

Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
 arch/riscv/Kconfig.socs | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index a9c3d2f6debca1469f4a912b3414711eb709baab..de163cdddcda1c08e7c9e98716eaf043d4c4555a 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -1,5 +1,10 @@
 menu "SoC selection"
 
+config ARCH_ANLOGIC
+	bool "Anlogic SoCs"
+	help
+		This enables support for Anlogic SoC platform hardware.
+
 config ARCH_MICROCHIP_POLARFIRE
 	def_bool ARCH_MICROCHIP
 

-- 
2.50.1
Re: [PATCH RFC 07/10] riscv: Add Anlogic SoC famly Kconfig support
Posted by Krzysztof Kozlowski 2 months, 2 weeks ago
On Mon, Jul 21, 2025 at 11:46:13PM +0800, Junhui Liu wrote:
> The first SoC in the Anlogic series is DR1V90, which contains a RISC-V
> core from Nuclei.
> 
> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
> ---
>  arch/riscv/Kconfig.socs | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index a9c3d2f6debca1469f4a912b3414711eb709baab..de163cdddcda1c08e7c9e98716eaf043d4c4555a 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -1,5 +1,10 @@
>  menu "SoC selection"
>  
> +config ARCH_ANLOGIC
> +	bool "Anlogic SoCs"
> +	help
> +		This enables support for Anlogic SoC platform hardware.

Wrong indentation. See everything else in this file or just read coding
style.

Best regards,
Krzysztof
Re: [PATCH RFC 07/10] riscv: Add Anlogic SoC famly Kconfig support
Posted by Junhui Liu 2 months, 2 weeks ago

On 22/07/2025 09:29, Krzysztof Kozlowski wrote:
> On Mon, Jul 21, 2025 at 11:46:13PM +0800, Junhui Liu wrote:
>> The first SoC in the Anlogic series is DR1V90, which contains a RISC-V
>> core from Nuclei.
>> 
>> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
>> ---
>>  arch/riscv/Kconfig.socs | 5 +++++
>>  1 file changed, 5 insertions(+)
>> 
>> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
>> index a9c3d2f6debca1469f4a912b3414711eb709baab..de163cdddcda1c08e7c9e98716eaf043d4c4555a 100644
>> --- a/arch/riscv/Kconfig.socs
>> +++ b/arch/riscv/Kconfig.socs
>> @@ -1,5 +1,10 @@
>>  menu "SoC selection"
>>  
>> +config ARCH_ANLOGIC
>> +	bool "Anlogic SoCs"
>> +	help
>> +		This enables support for Anlogic SoC platform hardware.
> 
> Wrong indentation. See everything else in this file or just read coding
> style.

Thanks for pointing this out. I overlooked it and will fix it in the
next version.

> 
> Best regards,
> Krzysztof

-- 
Best regards,
Junhui Liu