.../boot/dts/qcom/qcm6490-fairphone-fp5.dts | 6 +- arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 7 +-- .../boot/dts/qcom/qcm6490-shift-otter.dts | 6 +- arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 6 +- .../arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 6 +- arch/arm64/boot/dts/qcom/sc7280-idp.dts | 6 +- arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 6 +- arch/arm64/boot/dts/qcom/sc7280.dtsi | 59 ++++++++----------- .../boot/dts/qcom/sm7325-nothing-spacewar.dts | 6 +- 9 files changed, 42 insertions(+), 66 deletions(-)
Flatten primary usb controller node and update to using latest
bindings and flattened driver approach.
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
---
DTBS check has been done on all platforms. This patch has only been
compile tested since I dont have access to many of the platforms.
If folks from community can help test on any platforms, it would be
helpful. Thanks in advance.
.../boot/dts/qcom/qcm6490-fairphone-fp5.dts | 6 +-
arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 7 +--
.../boot/dts/qcom/qcm6490-shift-otter.dts | 6 +-
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 6 +-
.../arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 6 +-
arch/arm64/boot/dts/qcom/sc7280-idp.dts | 6 +-
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 6 +-
arch/arm64/boot/dts/qcom/sc7280.dtsi | 59 ++++++++-----------
.../boot/dts/qcom/sm7325-nothing-spacewar.dts | 6 +-
9 files changed, 42 insertions(+), 66 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
index e115b6a52b29..f17ac3dc9b06 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
@@ -1364,12 +1364,10 @@ &ufs_mem_phy {
};
&usb_1 {
- status = "okay";
-};
-
-&usb_1_dwc3 {
dr_mode = "otg";
usb-role-switch;
+
+ status = "okay";
};
&usb_1_dwc3_hs {
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
index 7a155ef6492e..8ed6e28b0c29 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
@@ -751,12 +751,9 @@ &ufs_mem_phy {
};
&usb_1 {
- status = "okay";
-};
-
-&usb_1_dwc3 {
- /delete-property/ usb-role-switch;
dr_mode = "peripheral";
+
+ status = "okay";
};
&usb_1_hsphy {
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts b/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts
index b9a0f7ac4d9c..eb8efba1b9dd 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts
@@ -910,12 +910,10 @@ &ufs_mem_phy {
};
&usb_1 {
- status = "okay";
-};
-
-&usb_1_dwc3 {
dr_mode = "otg";
usb-role-switch;
+
+ status = "okay";
};
&usb_1_dwc3_hs {
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
index 5fbcd48f2e2d..01f0b460305c 100644
--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
@@ -1127,12 +1127,10 @@ bluetooth: bluetooth {
};
&usb_1 {
- status = "okay";
-};
-
-&usb_1_dwc3 {
dr_mode = "otg";
usb-role-switch;
+
+ status = "okay";
};
&usb_1_dwc3_hs {
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
index 2ba4ea60cb14..5c5e4f1dd221 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
@@ -621,15 +621,13 @@ CROS_STD_MAIN_KEYMAP
};
&usb_1 {
- status = "okay";
-};
-
-&usb_1_dwc3 {
dr_mode = "host";
#address-cells = <1>;
#size-cells = <0>;
+ status = "okay";
+
/* 2.x hub on port 1 */
usb_hub_2_x: hub@1 {
compatible = "usbbda,5411";
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
index b5fe7356be48..3103f94cd685 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
@@ -81,11 +81,9 @@ channel@403 {
};
&usb_2 {
- status = "okay";
-};
-
-&usb_2_dwc3 {
dr_mode = "otg";
+
+ status = "okay";
};
&usb_2_hsphy {
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 90e5b9ab5b84..ccd39a1baeda 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -520,11 +520,9 @@ &ufs_mem_phy {
};
&usb_1 {
- status = "okay";
-};
-
-&usb_1_dwc3 {
dr_mode = "host";
+
+ status = "okay";
};
&usb_1_hsphy {
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index b1cc3bc1aec8..e94e21301bdd 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -4245,13 +4245,9 @@ compute-cb@14 {
};
usb_1: usb@a6f8800 {
- compatible = "qcom,sc7280-dwc3", "qcom,dwc3";
- reg = <0 0x0a6f8800 0 0x400>;
+ compatible = "qcom,sc7280-dwc3", "qcom,snps-dwc3";
+ reg = <0 0x0a6f8800 0 0xfc100>;
status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- dma-ranges;
clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>,
@@ -4268,12 +4264,14 @@ usb_1: usb@a6f8800 {
<&gcc GCC_USB30_PRIM_MASTER_CLK>;
assigned-clock-rates = <19200000>, <200000000>;
- interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 14 IRQ_TYPE_EDGE_BOTH>,
<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
<&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
"hs_phy_irq",
"dp_hs_phy_irq",
"dm_hs_phy_irq",
@@ -4290,37 +4288,32 @@ usb_1: usb@a6f8800 {
wakeup-source;
- usb_1_dwc3: usb@a600000 {
- compatible = "snps,dwc3";
- reg = <0 0x0a600000 0 0xe000>;
- interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
- iommus = <&apps_smmu 0xe0 0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_enblslpm_quirk;
- snps,parkmode-disable-ss-quirk;
- snps,dis-u1-entry-quirk;
- snps,dis-u2-entry-quirk;
- phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
- phy-names = "usb2-phy", "usb3-phy";
- maximum-speed = "super-speed";
+ iommus = <&apps_smmu 0xe0 0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_enblslpm_quirk;
+ snps,parkmode-disable-ss-quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
+ phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
+ phy-names = "usb2-phy", "usb3-phy";
+ maximum-speed = "super-speed";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
- port@0 {
- reg = <0>;
+ port@0 {
+ reg = <0>;
- usb_1_dwc3_hs: endpoint {
- };
+ usb_1_dwc3_hs: endpoint {
};
+ };
- port@1 {
- reg = <1>;
+ port@1 {
+ reg = <1>;
- usb_1_dwc3_ss: endpoint {
- remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
- };
+ usb_1_dwc3_ss: endpoint {
+ remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
};
};
};
diff --git a/arch/arm64/boot/dts/qcom/sm7325-nothing-spacewar.dts b/arch/arm64/boot/dts/qcom/sm7325-nothing-spacewar.dts
index befbb40228b5..f16b47b6a74c 100644
--- a/arch/arm64/boot/dts/qcom/sm7325-nothing-spacewar.dts
+++ b/arch/arm64/boot/dts/qcom/sm7325-nothing-spacewar.dts
@@ -1425,16 +1425,14 @@ &ufs_mem_phy {
&usb_1 {
/* USB 2.0 only */
qcom,select-utmi-as-pipe-clk;
- status = "okay";
-};
-
-&usb_1_dwc3 {
dr_mode = "otg";
usb-role-switch;
maximum-speed = "high-speed";
/* Remove USB3 phy */
phys = <&usb_1_hsphy>;
phy-names = "usb2-phy";
+
+ status = "okay";
};
&usb_1_dwc3_hs {
--
2.34.1
On 7/20/25 9:21 AM, Krishna Kurapati wrote: > Flatten primary usb controller node and update to using latest > bindings and flattened driver approach. > > Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> > --- [...] > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index b1cc3bc1aec8..e94e21301bdd 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -4245,13 +4245,9 @@ compute-cb@14 { > }; > > usb_1: usb@a6f8800 { > - compatible = "qcom,sc7280-dwc3", "qcom,dwc3"; > - reg = <0 0x0a6f8800 0 0x400>; > + compatible = "qcom,sc7280-dwc3", "qcom,snps-dwc3"; > + reg = <0 0x0a6f8800 0 0xfc100>; You forgot to change the base address Konrad
On Sun, 20 Jul 2025 12:51:25 +0530, Krishna Kurapati wrote: > Flatten primary usb controller node and update to using latest > bindings and flattened driver approach. > > Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> > --- > DTBS check has been done on all platforms. This patch has only been > compile tested since I dont have access to many of the platforms. > If folks from community can help test on any platforms, it would be > helpful. Thanks in advance. > > .../boot/dts/qcom/qcm6490-fairphone-fp5.dts | 6 +- > arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 7 +-- > .../boot/dts/qcom/qcm6490-shift-otter.dts | 6 +- > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 6 +- > .../arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 6 +- > arch/arm64/boot/dts/qcom/sc7280-idp.dts | 6 +- > arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 6 +- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 59 ++++++++----------- > .../boot/dts/qcom/sm7325-nothing-spacewar.dts | 6 +- > 9 files changed, 42 insertions(+), 66 deletions(-) > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade This patch series was applied (using b4) to base: Base: attempting to guess base-commit... Base: tags/next-20250718 (best guess, 8/9 blobs matched) If this is not the correct base, please add 'base-commit' tag (or use b4 which does this automatically) New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/qcom/' for 20250720072125.1514823-1-krishna.kurapati@oss.qualcomm.com: arch/arm64/boot/dts/qcom/sc7280-idp.dtb: usb@8cf8800 (qcom,sc7280-dwc3): 'dr_mode' does not match any of the regexes: '^pinctrl-[0-9]+$', '^usb@[0-9a-f]+$' from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
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