From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
The RK3399 EVB IND board has a Type-C interface DisplayPort.
It use fusb302 chip as Type-C controller.
fusb302 chip ---> USB/DP PHY0 <----> CDN-DP controller
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
---
Changes in v2:
- Add endpoint to link DP PHY and DP controller.
- Fix devicetree coding style.
.../boot/dts/rockchip/rk3399-evb-ind.dts | 133 ++++++++++++++++++
1 file changed, 133 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts
index 70aee1ab904c..997b822a57ff 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts
@@ -4,6 +4,7 @@
*/
/dts-v1/;
+#include <dt-bindings/usb/pd.h>
#include "rk3399.dtsi"
/ {
@@ -19,6 +20,21 @@ chosen {
stdout-path = "serial2:1500000n8";
};
+ sound: sound {
+ compatible = "rockchip,rk3399-gru-sound";
+ rockchip,cpu = <&i2s0 &spdif>;
+ };
+
+ vbus_typec: regulator-vbus-typec {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_typec0_en>;
+ regulator-name = "vbus_typec";
+ vin-supply = <&vcc5v0_sys>;
+ };
+
vcc5v0_sys: regulator-vcc5v0-sys {
compatible = "regulator-fixed";
enable-active-high;
@@ -31,6 +47,11 @@ vcc5v0_sys: regulator-vcc5v0-sys {
};
};
+&cdn_dp {
+ phys = <&tcphy0_dp>;
+ status = "okay";
+};
+
&cpu_b0 {
cpu-supply = <&vdd_cpu_b>;
};
@@ -55,6 +76,12 @@ &cpu_l3 {
cpu-supply = <&vdd_cpu_l>;
};
+&dp_out {
+ dp_controller_output: endpoint {
+ remote-endpoint = <&dp_phy_in>;
+ };
+};
+
&emmc_phy {
status = "okay";
};
@@ -341,6 +368,63 @@ regulator-state-mem {
};
};
+&i2c4 {
+ i2c-scl-rising-time-ns = <475>;
+ i2c-scl-falling-time-ns = <26>;
+ status = "okay";
+
+ usbc0: typec-portc@22 {
+ compatible = "fcs,fusb302";
+ reg = <0x22>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usbc0_int>;
+ vbus-supply = <&vbus_typec>;
+
+ usb_con: connector {
+ compatible = "usb-c-connector";
+ label = "USB-C";
+ data-role = "dual";
+ power-role = "dual";
+ try-power-role = "sink";
+ op-sink-microwatt = <1000000>;
+ sink-pdos =
+ <PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>;
+ source-pdos =
+ <PDO_FIXED(5000, 1500, PDO_FIXED_USB_COMM)>;
+
+ altmodes {
+ displayport {
+ svid = /bits/ 16 <0xff01>;
+ vdo = <0xffffffff>;
+ };
+ };
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usbc0_orien_sw: endpoint {
+ remote-endpoint = <&tcphy0_orientation_switch>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ dp_mode_sw: endpoint {
+ remote-endpoint = <&tcphy_dp_altmode_switch>;
+ };
+ };
+ };
+ };
+ };
+};
+
&i2s2 {
status = "okay";
};
@@ -354,6 +438,16 @@ &io_domains {
};
&pinctrl {
+ usb-typec {
+ usbc0_int: usbc0-int {
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ vcc5v0_typec0_en: vcc5v0-typec0-en {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -400,10 +494,48 @@ &sdmmc {
status = "okay";
};
+&sound {
+ rockchip,codec = <&cdn_dp>;
+ status = "okay";
+};
+
+&spdif {
+ status = "okay";
+};
+
&tcphy0 {
status = "okay";
};
+&tcphy0_dp {
+ mode-switch;
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcphy_dp_altmode_switch: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&dp_mode_sw>;
+ };
+
+ dp_phy_in: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&dp_controller_output>;
+ };
+ };
+};
+
+&tcphy0_usb3 {
+ orientation-switch;
+
+ port {
+ tcphy0_orientation_switch: endpoint {
+ remote-endpoint = <&usbc0_orien_sw>;
+ };
+ };
+};
+
&tcphy1 {
status = "okay";
};
@@ -461,6 +593,7 @@ &usb_host1_ohci {
};
&usbdrd_dwc3_0 {
+ usb-role-switch;
status = "okay";
};
--
2.49.0On Fri, Jul 18, 2025 at 02:26:19PM +0800, Chaoyi Chen wrote:
> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>
> The RK3399 EVB IND board has a Type-C interface DisplayPort.
> It use fusb302 chip as Type-C controller.
>
> fusb302 chip ---> USB/DP PHY0 <----> CDN-DP controller
>
> Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
> ---
>
> Changes in v2:
> - Add endpoint to link DP PHY and DP controller.
> - Fix devicetree coding style.
>
> .../boot/dts/rockchip/rk3399-evb-ind.dts | 133 ++++++++++++++++++
> 1 file changed, 133 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts
> index 70aee1ab904c..997b822a57ff 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts
> @@ -4,6 +4,7 @@
> */
>
> /dts-v1/;
> +#include <dt-bindings/usb/pd.h>
> #include "rk3399.dtsi"
>
> / {
> @@ -19,6 +20,21 @@ chosen {
> stdout-path = "serial2:1500000n8";
> };
>
> + sound: sound {
> + compatible = "rockchip,rk3399-gru-sound";
> + rockchip,cpu = <&i2s0 &spdif>;
> + };
> +
> + vbus_typec: regulator-vbus-typec {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&vcc5v0_typec0_en>;
> + regulator-name = "vbus_typec";
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> vcc5v0_sys: regulator-vcc5v0-sys {
> compatible = "regulator-fixed";
> enable-active-high;
> @@ -31,6 +47,11 @@ vcc5v0_sys: regulator-vcc5v0-sys {
> };
> };
>
> +&cdn_dp {
> + phys = <&tcphy0_dp>;
> + status = "okay";
> +};
> +
> &cpu_b0 {
> cpu-supply = <&vdd_cpu_b>;
> };
> @@ -55,6 +76,12 @@ &cpu_l3 {
> cpu-supply = <&vdd_cpu_l>;
> };
>
> +&dp_out {
> + dp_controller_output: endpoint {
> + remote-endpoint = <&dp_phy_in>;
> + };
> +};
> +
> &emmc_phy {
> status = "okay";
> };
> @@ -341,6 +368,63 @@ regulator-state-mem {
> };
> };
>
> +&i2c4 {
> + i2c-scl-rising-time-ns = <475>;
> + i2c-scl-falling-time-ns = <26>;
> + status = "okay";
> +
> + usbc0: typec-portc@22 {
> + compatible = "fcs,fusb302";
> + reg = <0x22>;
> + interrupt-parent = <&gpio1>;
> + interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&usbc0_int>;
> + vbus-supply = <&vbus_typec>;
> +
> + usb_con: connector {
> + compatible = "usb-c-connector";
> + label = "USB-C";
> + data-role = "dual";
> + power-role = "dual";
> + try-power-role = "sink";
> + op-sink-microwatt = <1000000>;
> + sink-pdos =
> + <PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>;
> + source-pdos =
> + <PDO_FIXED(5000, 1500, PDO_FIXED_USB_COMM)>;
> +
> + altmodes {
> + displayport {
> + svid = /bits/ 16 <0xff01>;
> + vdo = <0xffffffff>;
I don't think that this VDO is correct. Please adjust it according to
the spec.
> + };
> + };
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + usbc0_orien_sw: endpoint {
> + remote-endpoint = <&tcphy0_orientation_switch>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + dp_mode_sw: endpoint {
> + remote-endpoint = <&tcphy_dp_altmode_switch>;
> + };
> + };
> + };
> + };
> + };
> +};
> +
> &i2s2 {
> status = "okay";
> };
> @@ -354,6 +438,16 @@ &io_domains {
> };
>
> &pinctrl {
> + usb-typec {
> + usbc0_int: usbc0-int {
> + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> +
> + vcc5v0_typec0_en: vcc5v0-typec0-en {
> + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> pmic {
> pmic_int_l: pmic-int-l {
> rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
> @@ -400,10 +494,48 @@ &sdmmc {
> status = "okay";
> };
>
> +&sound {
> + rockchip,codec = <&cdn_dp>;
> + status = "okay";
> +};
> +
> +&spdif {
> + status = "okay";
> +};
> +
> &tcphy0 {
> status = "okay";
> };
>
> +&tcphy0_dp {
> + mode-switch;
But not an orientation-switch? Shouldn't it also note the SBU pins
orientation? Or DP lanes orientation?
> +
> + port {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + tcphy_dp_altmode_switch: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&dp_mode_sw>;
> + };
> +
> + dp_phy_in: endpoint@1 {
> + reg = <1>;
> + remote-endpoint = <&dp_controller_output>;
> + };
> + };
> +};
> +
> +&tcphy0_usb3 {
> + orientation-switch;
Hmmm.
> +
> + port {
> + tcphy0_orientation_switch: endpoint {
> + remote-endpoint = <&usbc0_orien_sw>;
> + };
> + };
> +};
> +
> &tcphy1 {
> status = "okay";
> };
> @@ -461,6 +593,7 @@ &usb_host1_ohci {
> };
>
> &usbdrd_dwc3_0 {
> + usb-role-switch;
This is an SoC-level property.
> status = "okay";
> };
>
> --
> 2.49.0
>
>
--
With best wishes
Dmitry
在 2025/7/19 18:50, Dmitry Baryshkov 写道:
> On Fri, Jul 18, 2025 at 02:26:19PM +0800, Chaoyi Chen wrote:
>> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>>
>> The RK3399 EVB IND board has a Type-C interface DisplayPort.
>> It use fusb302 chip as Type-C controller.
>>
>> fusb302 chip ---> USB/DP PHY0 <----> CDN-DP controller
>>
>> Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>> ---
>>
>> Changes in v2:
>> - Add endpoint to link DP PHY and DP controller.
>> - Fix devicetree coding style.
>>
>> .../boot/dts/rockchip/rk3399-evb-ind.dts | 133 ++++++++++++++++++
>> 1 file changed, 133 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts
>> index 70aee1ab904c..997b822a57ff 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts
>> +++ b/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts
>> @@ -4,6 +4,7 @@
>> */
>>
>> /dts-v1/;
>> +#include <dt-bindings/usb/pd.h>
>> #include "rk3399.dtsi"
>>
>> / {
>> @@ -19,6 +20,21 @@ chosen {
>> stdout-path = "serial2:1500000n8";
>> };
>>
>> + sound: sound {
>> + compatible = "rockchip,rk3399-gru-sound";
>> + rockchip,cpu = <&i2s0 &spdif>;
>> + };
>> +
>> + vbus_typec: regulator-vbus-typec {
>> + compatible = "regulator-fixed";
>> + enable-active-high;
>> + gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&vcc5v0_typec0_en>;
>> + regulator-name = "vbus_typec";
>> + vin-supply = <&vcc5v0_sys>;
>> + };
>> +
>> vcc5v0_sys: regulator-vcc5v0-sys {
>> compatible = "regulator-fixed";
>> enable-active-high;
>> @@ -31,6 +47,11 @@ vcc5v0_sys: regulator-vcc5v0-sys {
>> };
>> };
>>
>> +&cdn_dp {
>> + phys = <&tcphy0_dp>;
>> + status = "okay";
>> +};
>> +
>> &cpu_b0 {
>> cpu-supply = <&vdd_cpu_b>;
>> };
>> @@ -55,6 +76,12 @@ &cpu_l3 {
>> cpu-supply = <&vdd_cpu_l>;
>> };
>>
>> +&dp_out {
>> + dp_controller_output: endpoint {
>> + remote-endpoint = <&dp_phy_in>;
>> + };
>> +};
>> +
>> &emmc_phy {
>> status = "okay";
>> };
>> @@ -341,6 +368,63 @@ regulator-state-mem {
>> };
>> };
>>
>> +&i2c4 {
>> + i2c-scl-rising-time-ns = <475>;
>> + i2c-scl-falling-time-ns = <26>;
>> + status = "okay";
>> +
>> + usbc0: typec-portc@22 {
>> + compatible = "fcs,fusb302";
>> + reg = <0x22>;
>> + interrupt-parent = <&gpio1>;
>> + interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&usbc0_int>;
>> + vbus-supply = <&vbus_typec>;
>> +
>> + usb_con: connector {
>> + compatible = "usb-c-connector";
>> + label = "USB-C";
>> + data-role = "dual";
>> + power-role = "dual";
>> + try-power-role = "sink";
>> + op-sink-microwatt = <1000000>;
>> + sink-pdos =
>> + <PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>;
>> + source-pdos =
>> + <PDO_FIXED(5000, 1500, PDO_FIXED_USB_COMM)>;
>> +
>> + altmodes {
>> + displayport {
>> + svid = /bits/ 16 <0xff01>;
>> + vdo = <0xffffffff>;
> I don't think that this VDO is correct. Please adjust it according to
> the spec.
Will fix in v3.
>
>> + };
>> + };
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> +
>> + usbc0_orien_sw: endpoint {
>> + remote-endpoint = <&tcphy0_orientation_switch>;
>> + };
>> + };
>> +
>> + port@1 {
>> + reg = <1>;
>> +
>> + dp_mode_sw: endpoint {
>> + remote-endpoint = <&tcphy_dp_altmode_switch>;
>> + };
>> + };
>> + };
>> + };
>> + };
>> +};
>> +
>> &i2s2 {
>> status = "okay";
>> };
>> @@ -354,6 +438,16 @@ &io_domains {
>> };
>>
>> &pinctrl {
>> + usb-typec {
>> + usbc0_int: usbc0-int {
>> + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
>> + };
>> +
>> + vcc5v0_typec0_en: vcc5v0-typec0-en {
>> + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
>> + };
>> + };
>> +
>> pmic {
>> pmic_int_l: pmic-int-l {
>> rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
>> @@ -400,10 +494,48 @@ &sdmmc {
>> status = "okay";
>> };
>>
>> +&sound {
>> + rockchip,codec = <&cdn_dp>;
>> + status = "okay";
>> +};
>> +
>> +&spdif {
>> + status = "okay";
>> +};
>> +
>> &tcphy0 {
>> status = "okay";
>> };
>>
>> +&tcphy0_dp {
>> + mode-switch;
> But not an orientation-switch? Shouldn't it also note the SBU pins
> orientation? Or DP lanes orientation?
Ah, you will find it in tcphy0_usb3. Yes this should also apply to DP, it's combo PHY.
>
>> +
>> + port {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + tcphy_dp_altmode_switch: endpoint@0 {
>> + reg = <0>;
>> + remote-endpoint = <&dp_mode_sw>;
>> + };
>> +
>> + dp_phy_in: endpoint@1 {
>> + reg = <1>;
>> + remote-endpoint = <&dp_controller_output>;
>> + };
>> + };
>> +};
>> +
>> +&tcphy0_usb3 {
>> + orientation-switch;
>
> Hmmm.
Well, I put it under &tcp_phy0 at first, but it looks like someone has already added this in other dtsi. So I put the two prop under each "child" phy...
>
>> +
>> + port {
>> + tcphy0_orientation_switch: endpoint {
>> + remote-endpoint = <&usbc0_orien_sw>;
>> + };
>> + };
>> +};
>> +
>> &tcphy1 {
>> status = "okay";
>> };
>> @@ -461,6 +593,7 @@ &usb_host1_ohci {
>> };
>>
>> &usbdrd_dwc3_0 {
>> + usb-role-switch;
> This is an SoC-level property.
Will fix in v3.
>
>> status = "okay";
>> };
>>
>> --
>> 2.49.0
>>
>>
On 18/07/2025 08:26, Chaoyi Chen wrote:
> + altmodes {
> + displayport {
> + svid = /bits/ 16 <0xff01>;
> + vdo = <0xffffffff>;
> + };
> + };
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + usbc0_orien_sw: endpoint {
> + remote-endpoint = <&tcphy0_orientation_switch>;
How did you address feedback given here? I don't see any replies.
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + dp_mode_sw: endpoint {
> + remote-endpoint = <&tcphy_dp_altmode_switch>;
> + };
> + };
Best regards,
Krzysztof
Hi Krzysztof,
On 2025/7/18 16:14, Krzysztof Kozlowski wrote:
> On 18/07/2025 08:26, Chaoyi Chen wrote:
>> + altmodes {
>> + displayport {
>> + svid = /bits/ 16 <0xff01>;
>> + vdo = <0xffffffff>;
>> + };
>> + };
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> +
>> + usbc0_orien_sw: endpoint {
>> + remote-endpoint = <&tcphy0_orientation_switch>;
> How did you address feedback given here? I don't see any replies.
Sorry, I miss it. The port@0 should be used for USB HS. Will fix in v3.
>
>> + };
>> + };
>> +
>> + port@1 {
>> + reg = <1>;
>> +
>> + dp_mode_sw: endpoint {
>> + remote-endpoint = <&tcphy_dp_altmode_switch>;
>> + };
>> + };
>
>
> Best regards,
> Krzysztof
>
>
On Fri, Jul 18, 2025 at 02:26:19PM +0800, Chaoyi Chen wrote:
> +&i2c4 {
> + i2c-scl-rising-time-ns = <475>;
> + i2c-scl-falling-time-ns = <26>;
> + status = "okay";
> +
> + usbc0: typec-portc@22 {
> + compatible = "fcs,fusb302";
Look at your binding - it said you don't have fcs,fusb302 - but directly
port plugged to the PHY...
Plus this looks like the switch. I don't think you really addressed
previous comments. Please give it a time.
Best regards,
Krzysztof
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