From: dongsheng <dongsheng.x.zhang@intel.com>
As the VM-Exit/VM-Entry overcount issue on Intel Atom platforms,
there is no way to validate the precise count for "instructions" and
"branches" events on these overcounted Atom platforms. Thus relax the
precise count validation on these overcounted platforms.
Signed-off-by: dongsheng <dongsheng.x.zhang@intel.com>
Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Tested-by: Yi Lai <yi1.lai@intel.com>
---
x86/pmu.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/x86/pmu.c b/x86/pmu.c
index 87365aff..04946d10 100644
--- a/x86/pmu.c
+++ b/x86/pmu.c
@@ -237,10 +237,15 @@ static void adjust_events_range(struct pmu_event *gp_events,
* occur while running the measured code, e.g. if the host takes IRQs.
*/
if (pmu.is_intel && this_cpu_has_perf_global_ctrl()) {
- gp_events[instruction_idx].min = LOOP_INSNS;
- gp_events[instruction_idx].max = LOOP_INSNS;
- gp_events[branch_idx].min = LOOP_BRANCHES;
- gp_events[branch_idx].max = LOOP_BRANCHES;
+ if (!(intel_inst_overcount_flags & INST_RETIRED_OVERCOUNT)) {
+ gp_events[instruction_idx].min = LOOP_INSNS;
+ gp_events[instruction_idx].max = LOOP_INSNS;
+ }
+
+ if (!(intel_inst_overcount_flags & BR_RETIRED_OVERCOUNT)) {
+ gp_events[branch_idx].min = LOOP_BRANCHES;
+ gp_events[branch_idx].max = LOOP_BRANCHES;
+ }
}
/*
--
2.34.1