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x86/apic: Drop useless CXL/CPX row from the TSC deadline errata table

Andrew Cooper posted 1 patch 6 months, 3 weeks ago
There is a newer version of this series
x86/apic: Drop useless CXL/CPX row from the TSC deadline errata table
Posted by Andrew Cooper 6 months, 3 weeks ago 
A microcode revision of 0 is guaranteed to exit apic_validate_deadline_timer()
early, but a better way is with no row at all.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Ingo Molnar <mingo@redhat.com>
CC: Borislav Petkov <bp@alien8.de>
CC: Dave Hansen <dave.hansen@linux.intel.com>
CC: x86@kernel.org
CC: "H. Peter Anvin" <hpa@zytor.com>
CC: Peter Zijlstra <peterz@infradead.org>
CC: Sohil Mehta <sohil.mehta@intel.com>
CC: Yuntao Wang <yuntao.wang@linux.dev>
CC: Zhang Rui <rui.zhang@intel.com>
CC: linux-kernel@vger.kernel.org

Strictly speaking, this is:

  Fixes: 66abf2388331 ("x86/apic: Convert the TSC deadline timer matching to steppings macro")

but I really don't think it's interesting to backport.

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index d73ba5a7b623..6ace71c52bee 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -522,7 +522,6 @@ static const struct x86_cpu_id deadline_match[] __initconst = {
 
 	X86_MATCH_VFM_STEPS(INTEL_SKYLAKE_X,   0x3, 0x3, 0x01000136),
 	X86_MATCH_VFM_STEPS(INTEL_SKYLAKE_X,   0x4, 0x4, 0x02000014),
-	X86_MATCH_VFM_STEPS(INTEL_SKYLAKE_X,   0x5, 0xf, 0),
 
 	X86_MATCH_VFM(INTEL_HASWELL,		0x22),
 	X86_MATCH_VFM(INTEL_HASWELL_L,		0x20),
Re: x86/apic: Drop useless row from the TSC deadline errata table
Posted by Dave Hansen 1 month ago 
On 7/16/25 09:08, Andrew Cooper wrote:
> A microcode revision of 0 is guaranteed to exit
> apic_validate_deadline_timer() early, but a better way is with no
> row at all.
> 
> No functional change.

There's one bit of background that is missing which is that the
steppings are unaffected by the erratum. How about this for a changelog?

The later INTEL_SKYLAKE_X steppings (0x5=>0xf, aka. CXL/CPX) are
unaffected by the TSC deadline erratum. There is an entry in the
deadline_match[] table to reflect this. It puts puts a '0' in the table
to represent that all microcode versions >=0 are unaffected by the erratum.

That entry is unnecessary. The best way to indicate that a CPU is
unaffected is to simply omit it from the table.

Remove the stepping >=0x5 entry from the table.
Re: x86/apic: Drop useless CXL/CPX row from the TSC deadline errata table
Posted by Sohil Mehta 6 months, 3 weeks ago 
On 7/16/2025 9:08 AM, Andrew Cooper wrote:
> A microcode revision of 0 is guaranteed to exit apic_validate_deadline_timer()
> early, but a better way is with no row at all.
> 

Yeah, not having an entry is much better. "exit" can be a bit ambiguous.
Should we be slightly more precise?

A microcode revision of 0 is guaranteed to return true for
apic_validate_deadline_timer(), but a better way is with no row at all.

> No functional change.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> ---

Reviewed-by: Sohil Mehta <sohil.mehta@intel.com>


> CC: Thomas Gleixner <tglx@linutronix.de>
> CC: Ingo Molnar <mingo@redhat.com>
> CC: Borislav Petkov <bp@alien8.de>
> CC: Dave Hansen <dave.hansen@linux.intel.com>
> CC: x86@kernel.org
> CC: "H. Peter Anvin" <hpa@zytor.com>
> CC: Peter Zijlstra <peterz@infradead.org>
> CC: Sohil Mehta <sohil.mehta@intel.com>
> CC: Yuntao Wang <yuntao.wang@linux.dev>
> CC: Zhang Rui <rui.zhang@intel.com>
> CC: linux-kernel@vger.kernel.org
> 
> Strictly speaking, this is:
> 
>   Fixes: 66abf2388331 ("x86/apic: Convert the TSC deadline timer matching to steppings macro")
> 
> but I really don't think it's interesting to backport.
>
Re: x86/apic: Drop useless CXL/CPX row from the TSC deadline errata table
Posted by Andrew Cooper 6 months, 3 weeks ago 
On 17/07/2025 9:25 pm, Sohil Mehta wrote:
> On 7/16/2025 9:08 AM, Andrew Cooper wrote:
>> A microcode revision of 0 is guaranteed to exit apic_validate_deadline_timer()
>> early, but a better way is with no row at all.
>>
> Yeah, not having an entry is much better. "exit" can be a bit ambiguous.
> Should we be slightly more precise?

It's "exit $foo early", although this is slightly hidden by the linebreak.

Alternatively, it could be phrased as "exit early from $foo" if you
think that's clearer?

>
> A microcode revision of 0 is guaranteed to return true for
> apic_validate_deadline_timer(), but a better way is with no row at all.
>
>> No functional change.
>>
>> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
>> ---
> Reviewed-by: Sohil Mehta <sohil.mehta@intel.com>

Thanks.

~Andrew
Re: x86/apic: Drop useless CXL/CPX row from the TSC deadline errata table
Posted by Sohil Mehta 6 months, 3 weeks ago 
On 7/18/2025 3:43 AM, Andrew Cooper wrote:
> On 17/07/2025 9:25 pm, Sohil Mehta wrote:
>> On 7/16/2025 9:08 AM, Andrew Cooper wrote:
>>> A microcode revision of 0 is guaranteed to exit apic_validate_deadline_timer()
>>> early, but a better way is with no row at all.
>>>
>> Yeah, not having an entry is much better. "exit" can be a bit ambiguous.
>> Should we be slightly more precise?
> 
> It's "exit $foo early", although this is slightly hidden by the linebreak.
> 

Sorry, I was being too finicky.

I meant that a microcode revision of 0 would cause
apic_validate_deadline_timer() to exit with the return value of true.

	if (boot_cpu_data.microcode >= rev)
		return true;

Not having a row as well would return true because of:

	m = x86_match_cpu(deadline_match);
	if (!m)
		return true;

I wanted to highlight that apic_validate_deadline_timer() would return
*true* in both cases, rather than just "exit" early.

What you have right now is okay as well :)

> Alternatively, it could be phrased as "exit early from $foo" if you
> think that's clearer?
> 
>>
>> A microcode revision of 0 is guaranteed to return true for
>> apic_validate_deadline_timer(), but a better way is with no row at all.
>>

Sohil
[PATCH v2] x86/apic: Drop useless CXL/CPX row from the TSC deadline errata table
Posted by Andrew Cooper 1 month ago 
This erratum is fixed in later steppings.

Instead of including the fixed steppings in the table in a way that will
unconditionally cause apic_validate_deadline_timer() to decide "not
vulnerable", simply omit the row.

No functional change.

Reviewed-by: Sohil Mehta <sohil.mehta@intel.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Ingo Molnar <mingo@redhat.com>
CC: Borislav Petkov <bp@alien8.de>
CC: Dave Hansen <dave.hansen@linux.intel.com>
CC: x86@kernel.org
CC: "H. Peter Anvin" <hpa@zytor.com>
CC: Peter Zijlstra <peterz@infradead.org>
CC: Sohil Mehta <sohil.mehta@intel.com>
CC: Yuntao Wang <yuntao.wang@linux.dev>
CC: Zhang Rui <rui.zhang@intel.com>
CC: linux-kernel@vger.kernel.org

v2:
 * Adjust the commit message.

Strictly speaking, this is:

  Fixes: 66abf2388331 ("x86/apic: Convert the TSC deadline timer matching to steppings macro")

but I really don't think it's interesting to backport.
---
 arch/x86/kernel/apic/apic.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index d93f87f29d03..829c8efce1c1 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -524,7 +524,6 @@ static const struct x86_cpu_id deadline_match[] __initconst = {
 
 	X86_MATCH_VFM_STEPS(INTEL_SKYLAKE_X,   0x3, 0x3, 0x01000136),
 	X86_MATCH_VFM_STEPS(INTEL_SKYLAKE_X,   0x4, 0x4, 0x02000014),
-	X86_MATCH_VFM_STEPS(INTEL_SKYLAKE_X,   0x5, 0xf, 0),
 
 	X86_MATCH_VFM(INTEL_HASWELL,		0x22),
 	X86_MATCH_VFM(INTEL_HASWELL_L,		0x20),

base-commit: 7f98ab9da046865d57c102fd3ca9669a29845f67
-- 
2.39.5

Patchew 2.1-devel-b67e4c2

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