From: Taniya Das <taniya.das@oss.qualcomm.com>
The Glymur TCSR block provides CLKREF clocks for EDP, PCIe, and USB. Add
this to the TCSR clock controller binding together with identifiers for
the clocks
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com>
---
.../bindings/clock/qcom,sm8550-tcsr.yaml | 3 +++
.../dt-bindings/clock/qcom,glymur-tcsrcc.h | 24 +++++++++++++++++++
2 files changed, 27 insertions(+)
create mode 100644 include/dt-bindings/clock/qcom,glymur-tcsrcc.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
index f3afbb25e868..9fbf88836782 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
@@ -8,12 +8,14 @@ title: Qualcomm TCSR Clock Controller on SM8550
maintainers:
- Bjorn Andersson <andersson@kernel.org>
+ - Taniya Das <taniya.das@oss.qualcomm.com>
description: |
Qualcomm TCSR clock control module provides the clocks, resets and
power domains on SM8550
See also:
+ - include/dt-bindings/clock/qcom,glymur-tcsr.h
- include/dt-bindings/clock/qcom,sm8550-tcsr.h
- include/dt-bindings/clock/qcom,sm8650-tcsr.h
- include/dt-bindings/clock/qcom,sm8750-tcsr.h
@@ -22,6 +24,7 @@ properties:
compatible:
items:
- enum:
+ - qcom,glymur-tcsr
- qcom,sar2130p-tcsr
- qcom,sm8550-tcsr
- qcom,sm8650-tcsr
diff --git a/include/dt-bindings/clock/qcom,glymur-tcsrcc.h b/include/dt-bindings/clock/qcom,glymur-tcsrcc.h
new file mode 100644
index 000000000000..72614226b113
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,glymur-tcsrcc.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_GLYMUR_H
+#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_GLYMUR_H
+
+/* TCSR_CC clocks */
+#define TCSR_EDP_CLKREF_EN 0
+#define TCSR_PCIE_1_CLKREF_EN 1
+#define TCSR_PCIE_2_CLKREF_EN 2
+#define TCSR_PCIE_3_CLKREF_EN 3
+#define TCSR_PCIE_4_CLKREF_EN 4
+#define TCSR_USB2_1_CLKREF_EN 5
+#define TCSR_USB2_2_CLKREF_EN 6
+#define TCSR_USB2_3_CLKREF_EN 7
+#define TCSR_USB2_4_CLKREF_EN 8
+#define TCSR_USB3_0_CLKREF_EN 9
+#define TCSR_USB3_1_CLKREF_EN 10
+#define TCSR_USB4_1_CLKREF_EN 11
+#define TCSR_USB4_2_CLKREF_EN 12
+
+#endif
--
2.34.1
On Wed, Jul 16, 2025 at 08:50:12PM +0530, Pankaj Patil wrote: > From: Taniya Das <taniya.das@oss.qualcomm.com> > > The Glymur TCSR block provides CLKREF clocks for EDP, PCIe, and USB. Add > this to the TCSR clock controller binding together with identifiers for > the clocks > > Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> > Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> A nit, subject: drop second/last, redundant "bindings". The "dt-bindings" prefix is already stating that these are bindings. See also: https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18 And same for documentation... > --- > .../bindings/clock/qcom,sm8550-tcsr.yaml | 3 +++ > .../dt-bindings/clock/qcom,glymur-tcsrcc.h | 24 +++++++++++++++++++ > 2 files changed, 27 insertions(+) > create mode 100644 include/dt-bindings/clock/qcom,glymur-tcsrcc.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > index f3afbb25e868..9fbf88836782 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > @@ -8,12 +8,14 @@ title: Qualcomm TCSR Clock Controller on SM8550 > > maintainers: > - Bjorn Andersson <andersson@kernel.org> > + - Taniya Das <taniya.das@oss.qualcomm.com> > > description: | > Qualcomm TCSR clock control module provides the clocks, resets and > power domains on SM8550 > > See also: > + - include/dt-bindings/clock/qcom,glymur-tcsr.h > - include/dt-bindings/clock/qcom,sm8550-tcsr.h > - include/dt-bindings/clock/qcom,sm8650-tcsr.h > - include/dt-bindings/clock/qcom,sm8750-tcsr.h > @@ -22,6 +24,7 @@ properties: > compatible: > items: > - enum: > + - qcom,glymur-tcsr > - qcom,sar2130p-tcsr > - qcom,sm8550-tcsr > - qcom,sm8650-tcsr > diff --git a/include/dt-bindings/clock/qcom,glymur-tcsrcc.h b/include/dt-bindings/clock/qcom,glymur-tcsrcc.h > new file mode 100644 > index 000000000000..72614226b113 > --- /dev/null > +++ b/include/dt-bindings/clock/qcom,glymur-tcsrcc.h Filename matching compatible. Best regards, Krzysztof
On 7/21/2025 2:49 PM, Krzysztof Kozlowski wrote: > On Wed, Jul 16, 2025 at 08:50:12PM +0530, Pankaj Patil wrote: >> From: Taniya Das <taniya.das@oss.qualcomm.com> >> >> The Glymur TCSR block provides CLKREF clocks for EDP, PCIe, and USB. Add >> this to the TCSR clock controller binding together with identifiers for >> the clocks >> >> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> >> Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> > > A nit, subject: drop second/last, redundant "bindings". The > "dt-bindings" prefix is already stating that these are bindings. > See also: > https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18 > > And same for documentation... > Will fix this as well. >> --- >> .../bindings/clock/qcom,sm8550-tcsr.yaml | 3 +++ >> .../dt-bindings/clock/qcom,glymur-tcsrcc.h | 24 +++++++++++++++++++ >> 2 files changed, 27 insertions(+) >> create mode 100644 include/dt-bindings/clock/qcom,glymur-tcsrcc.h >> >> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml >> index f3afbb25e868..9fbf88836782 100644 >> --- a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml >> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml >> @@ -8,12 +8,14 @@ title: Qualcomm TCSR Clock Controller on SM8550 >> >> maintainers: >> - Bjorn Andersson <andersson@kernel.org> >> + - Taniya Das <taniya.das@oss.qualcomm.com> >> >> description: | >> Qualcomm TCSR clock control module provides the clocks, resets and >> power domains on SM8550 >> >> See also: >> + - include/dt-bindings/clock/qcom,glymur-tcsr.h >> - include/dt-bindings/clock/qcom,sm8550-tcsr.h >> - include/dt-bindings/clock/qcom,sm8650-tcsr.h >> - include/dt-bindings/clock/qcom,sm8750-tcsr.h >> @@ -22,6 +24,7 @@ properties: >> compatible: >> items: >> - enum: >> + - qcom,glymur-tcsr >> - qcom,sar2130p-tcsr >> - qcom,sm8550-tcsr >> - qcom,sm8650-tcsr >> diff --git a/include/dt-bindings/clock/qcom,glymur-tcsrcc.h b/include/dt-bindings/clock/qcom,glymur-tcsrcc.h >> new file mode 100644 >> index 000000000000..72614226b113 >> --- /dev/null >> +++ b/include/dt-bindings/clock/qcom,glymur-tcsrcc.h > > Filename matching compatible. > > Best regards, > Krzysztof > Yes, I will take care. -- Thanks, Taniya Das
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