drivers/mmc/host/sdhci-pci-gli.c | 9 +++++++++ 1 file changed, 9 insertions(+)
From: Victor Shih <victor.shih@genesyslogic.com.tw>
Due to a flaw in the hardware design, the GL9763e replay timer frequently
times out when ASPM is enabled. As a result, the warning messages will
often appear in the system log when the system accesses the GL9763e
PCI config. Therefore, the replay timer timeout must be masked.
Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
---
drivers/mmc/host/sdhci-pci-gli.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
index 4c2ae71770f7..eb3954729a3c 100644
--- a/drivers/mmc/host/sdhci-pci-gli.c
+++ b/drivers/mmc/host/sdhci-pci-gli.c
@@ -1754,6 +1754,7 @@ static int gl9763e_add_host(struct sdhci_pci_slot *slot)
static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
{
struct pci_dev *pdev = slot->chip->pdev;
+ int aer;
u32 value;
pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
@@ -1780,6 +1781,14 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
value |= FIELD_PREP(GLI_9763E_HS400_RXDLY, GLI_9763E_HS400_RXDLY_5);
pci_write_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, value);
+ /* mask the replay timer timeout of AER */
+ aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
+ if (aer) {
+ pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
+ value |= PCI_ERR_COR_REP_TIMER;
+ pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
+ }
+
pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
value &= ~GLI_9763E_VHS_REV;
value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
--
2.43.0
On 16/07/2025 13:43, Victor Shih wrote:
> From: Victor Shih <victor.shih@genesyslogic.com.tw>
>
> Due to a flaw in the hardware design, the GL9763e replay timer frequently
> times out when ASPM is enabled. As a result, the warning messages will
> often appear in the system log when the system accesses the GL9763e
> PCI config. Therefore, the replay timer timeout must be masked.
>
> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
> ---
> drivers/mmc/host/sdhci-pci-gli.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> index 4c2ae71770f7..eb3954729a3c 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -1754,6 +1754,7 @@ static int gl9763e_add_host(struct sdhci_pci_slot *slot)
> static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
> {
> struct pci_dev *pdev = slot->chip->pdev;
> + int aer;
> u32 value;
>
> pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
> @@ -1780,6 +1781,14 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
> value |= FIELD_PREP(GLI_9763E_HS400_RXDLY, GLI_9763E_HS400_RXDLY_5);
> pci_write_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, value);
>
> + /* mask the replay timer timeout of AER */
> + aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
> + if (aer) {
> + pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
> + value |= PCI_ERR_COR_REP_TIMER;
> + pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
> + }
The same code is in gl9750_hw_setting() and gl9755_hw_setting()
so it could be a separate little function.
Also should gli_set_gl9763e() be renamed gl9763e_hw_setting() for
consistency?
Also should this have a fixes tag?
> +
> pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
> value &= ~GLI_9763E_VHS_REV;
> value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
On Thu, Jul 24, 2025 at 7:59 PM Adrian Hunter <adrian.hunter@intel.com> wrote:
>
> On 16/07/2025 13:43, Victor Shih wrote:
> > From: Victor Shih <victor.shih@genesyslogic.com.tw>
> >
> > Due to a flaw in the hardware design, the GL9763e replay timer frequently
> > times out when ASPM is enabled. As a result, the warning messages will
> > often appear in the system log when the system accesses the GL9763e
> > PCI config. Therefore, the replay timer timeout must be masked.
> >
> > Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
> > ---
> > drivers/mmc/host/sdhci-pci-gli.c | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> > index 4c2ae71770f7..eb3954729a3c 100644
> > --- a/drivers/mmc/host/sdhci-pci-gli.c
> > +++ b/drivers/mmc/host/sdhci-pci-gli.c
> > @@ -1754,6 +1754,7 @@ static int gl9763e_add_host(struct sdhci_pci_slot *slot)
> > static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
> > {
> > struct pci_dev *pdev = slot->chip->pdev;
> > + int aer;
> > u32 value;
> >
> > pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
> > @@ -1780,6 +1781,14 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
> > value |= FIELD_PREP(GLI_9763E_HS400_RXDLY, GLI_9763E_HS400_RXDLY_5);
> > pci_write_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, value);
> >
> > + /* mask the replay timer timeout of AER */
> > + aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
> > + if (aer) {
> > + pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
> > + value |= PCI_ERR_COR_REP_TIMER;
> > + pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
> > + }
>
> The same code is in gl9750_hw_setting() and gl9755_hw_setting()
> so it could be a separate little function.
>
> Also should gli_set_gl9763e() be renamed gl9763e_hw_setting() for
> consistency?
>
> Also should this have a fixes tag?
>
Hi, Adrian
Ok, I will update in the next version.
I think I should only need the stable tag.
Thanks, Victor Shih
> > +
> > pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
> > value &= ~GLI_9763E_VHS_REV;
> > value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
>
Hi, Ulf and Adrian
Please help to review this patch and let me know if there is anything
that needs to be modified.
Thanks.
Thanks, Victor Shih
On Wed, Jul 16, 2025 at 6:43 PM Victor Shih <victorshihgli@gmail.com> wrote:
>
> From: Victor Shih <victor.shih@genesyslogic.com.tw>
>
> Due to a flaw in the hardware design, the GL9763e replay timer frequently
> times out when ASPM is enabled. As a result, the warning messages will
> often appear in the system log when the system accesses the GL9763e
> PCI config. Therefore, the replay timer timeout must be masked.
>
> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
> ---
> drivers/mmc/host/sdhci-pci-gli.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> index 4c2ae71770f7..eb3954729a3c 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -1754,6 +1754,7 @@ static int gl9763e_add_host(struct sdhci_pci_slot *slot)
> static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
> {
> struct pci_dev *pdev = slot->chip->pdev;
> + int aer;
> u32 value;
>
> pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
> @@ -1780,6 +1781,14 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
> value |= FIELD_PREP(GLI_9763E_HS400_RXDLY, GLI_9763E_HS400_RXDLY_5);
> pci_write_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, value);
>
> + /* mask the replay timer timeout of AER */
> + aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
> + if (aer) {
> + pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
> + value |= PCI_ERR_COR_REP_TIMER;
> + pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
> + }
> +
> pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
> value &= ~GLI_9763E_VHS_REV;
> value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
> --
> 2.43.0
>
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