The HAMOA-IOT-SOM is a compact computing module that integrates a System
on Chip (SoC) — specifically the x1e80100 — along with essential
components optimized for IoT applications. It is designed to be mounted on
carrier boards, enabling the development of complete embedded systems.
This change enables and overlays the following components:
- Regulators on the SOM
- Reserved memory regions
- PCIe6a and its PHY
- PCIe4 and its PHY
- USB0 through USB6 and their PHYs
- ADSP, CDSP
- WLAN, Bluetooth (M.2 interface)
Written with contributions from Yingying Tang (added PCIe4 and its PHY to
enable WLAN).
Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 607 ++++++++++++++++++++++++++++
1 file changed, 607 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..dad24a6a49ad370aee48a9fd8f4a46f64c2b6348
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
@@ -0,0 +1,607 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#include "x1e80100.dtsi"
+#include "x1e80100-pmics.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+
+/ {
+ reserved-memory {
+ linux,cma {
+ compatible = "shared-dma-pool";
+ size = <0x0 0x8000000>;
+ reusable;
+ linux,cma-default;
+ };
+ };
+};
+
+&apps_rsc {
+ /* PMC8380C_B */
+ regulators-0 {
+ compatible = "qcom,pm8550-rpmh-regulators";
+ qcom,pmic-id = "b";
+
+ vdd-bob1-supply = <&vph_pwr>;
+ vdd-bob2-supply = <&vph_pwr>;
+ vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>;
+ vdd-l2-l13-l14-supply = <&vreg_bob1>;
+ vdd-l5-l16-supply = <&vreg_bob1>;
+ vdd-l6-l7-supply = <&vreg_bob2>;
+ vdd-l8-l9-supply = <&vreg_bob1>;
+ vdd-l12-supply = <&vreg_s5j_1p2>;
+ vdd-l15-supply = <&vreg_s4c_1p8>;
+ vdd-l17-supply = <&vreg_bob2>;
+
+ vreg_bob1: bob1 {
+ regulator-name = "vreg_bob1";
+ regulator-min-microvolt = <3008000>;
+ regulator-max-microvolt = <3960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_bob2: bob2 {
+ regulator-name = "vreg_bob2";
+ regulator-min-microvolt = <2504000>;
+ regulator-max-microvolt = <3008000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1b_1p8: ldo1 {
+ regulator-name = "vreg_l1b_1p8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2b_3p0: ldo2 {
+ regulator-name = "vreg_l2b_3p0";
+ regulator-min-microvolt = <3072000>;
+ regulator-max-microvolt = <3100000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l4b_1p8: ldo4 {
+ regulator-name = "vreg_l4b_1p8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l5b_3p0: ldo5 {
+ regulator-name = "vreg_l5b_3p0";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l6b_1p8: ldo6 {
+ regulator-name = "vreg_l6b_1p8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l7b_2p8: ldo7 {
+ regulator-name = "vreg_l7b_2p8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l8b_3p0: ldo8 {
+ regulator-name = "vreg_l8b_3p0";
+ regulator-min-microvolt = <3072000>;
+ regulator-max-microvolt = <3072000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l9b_2p9: ldo9 {
+ regulator-name = "vreg_l9b_2p9";
+ regulator-min-microvolt = <2960000>;
+ regulator-max-microvolt = <2960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l10b_1p8: ldo10 {
+ regulator-name = "vreg_l10b_1p8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l12b_1p2: ldo12 {
+ regulator-name = "vreg_l12b_1p2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-always-on;
+ };
+
+ vreg_l13b_3p0: ldo13 {
+ regulator-name = "vreg_l13b_3p0";
+ regulator-min-microvolt = <3072000>;
+ regulator-max-microvolt = <3100000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l14b_3p0: ldo14 {
+ regulator-name = "vreg_l14b_3p0";
+ regulator-min-microvolt = <3072000>;
+ regulator-max-microvolt = <3072000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l15b_1p8: ldo15 {
+ regulator-name = "vreg_l15b_1p8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-always-on;
+ };
+
+ vreg_l16b_2p9: ldo16 {
+ regulator-name = "vreg_l16b_2p9";
+ regulator-min-microvolt = <2912000>;
+ regulator-max-microvolt = <2912000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l17b_2p5: ldo17 {
+ regulator-name = "vreg_l17b_2p5";
+ regulator-min-microvolt = <2504000>;
+ regulator-max-microvolt = <2504000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ /* PMC8380VE_C */
+ regulators-1 {
+ compatible = "qcom,pm8550ve-rpmh-regulators";
+ qcom,pmic-id = "c";
+
+ vdd-l1-supply = <&vreg_s5j_1p2>;
+ vdd-l2-supply = <&vreg_s1f_0p7>;
+ vdd-l3-supply = <&vreg_s1f_0p7>;
+ vdd-s4-supply = <&vph_pwr>;
+
+ vreg_s4c_1p8: smps4 {
+ regulator-name = "vreg_s4c_1p8";
+ regulator-min-microvolt = <1856000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1c_1p2: ldo1 {
+ regulator-name = "vreg_l1c_1p2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2c_0p8: ldo2 {
+ regulator-name = "vreg_l2c_0p8";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3c_0p8: ldo3 {
+ regulator-name = "vreg_l3c_0p8";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ /* PMC8380_D */
+ regulators-2 {
+ compatible = "qcom,pmc8380-rpmh-regulators";
+ qcom,pmic-id = "d";
+
+ vdd-l1-supply = <&vreg_s1f_0p7>;
+ vdd-l2-supply = <&vreg_s1f_0p7>;
+ vdd-l3-supply = <&vreg_s4c_1p8>;
+ vdd-s1-supply = <&vph_pwr>;
+
+ vreg_l1d_0p8: ldo1 {
+ regulator-name = "vreg_l1d_0p8";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2d_0p9: ldo2 {
+ regulator-name = "vreg_l2d_0p9";
+ regulator-min-microvolt = <912000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3d_1p8: ldo3 {
+ regulator-name = "vreg_l3d_1p8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ /* PMC8380_E */
+ regulators-3 {
+ compatible = "qcom,pmc8380-rpmh-regulators";
+ qcom,pmic-id = "e";
+
+ vdd-l2-supply = <&vreg_s1f_0p7>;
+ vdd-l3-supply = <&vreg_s5j_1p2>;
+
+ vreg_l2e_0p8: ldo2 {
+ regulator-name = "vreg_l2e_0p8";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3e_1p2: ldo3 {
+ regulator-name = "vreg_l3e_1p2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ /* PMC8380_F */
+ regulators-4 {
+ compatible = "qcom,pmc8380-rpmh-regulators";
+ qcom,pmic-id = "f";
+
+ vdd-l1-supply = <&vreg_s5j_1p2>;
+ vdd-l2-supply = <&vreg_s5j_1p2>;
+ vdd-l3-supply = <&vreg_s5j_1p2>;
+ vdd-s1-supply = <&vph_pwr>;
+
+ vreg_s1f_0p7: smps1 {
+ regulator-name = "vreg_s1f_0p7";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1f_1p0: ldo1 {
+ regulator-name = "vreg_l1f_1p0";
+ regulator-min-microvolt = <1024000>;
+ regulator-max-microvolt = <1024000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2f_1p0: ldo2 {
+ regulator-name = "vreg_l2f_1p0";
+ regulator-min-microvolt = <1024000>;
+ regulator-max-microvolt = <1024000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3f_1p0: ldo3 {
+ regulator-name = "vreg_l3f_1p0";
+ regulator-min-microvolt = <1024000>;
+ regulator-max-microvolt = <1024000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ /* PMC8380VE_I */
+ regulators-6 {
+ compatible = "qcom,pm8550ve-rpmh-regulators";
+ qcom,pmic-id = "i";
+
+ vdd-l1-supply = <&vreg_s4c_1p8>;
+ vdd-l2-supply = <&vreg_s5j_1p2>;
+ vdd-l3-supply = <&vreg_s1f_0p7>;
+ vdd-s1-supply = <&vph_pwr>;
+ vdd-s2-supply = <&vph_pwr>;
+
+ vreg_s1i_0p9: smps1 {
+ regulator-name = "vreg_s1i_0p9";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s2i_1p0: smps2 {
+ regulator-name = "vreg_s2i_1p0";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1i_1p8: ldo1 {
+ regulator-name = "vreg_l1i_1p8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2i_1p2: ldo2 {
+ regulator-name = "vreg_l2i_1p2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3i_0p8: ldo3 {
+ regulator-name = "vreg_l3i_0p8";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ /* PMC8380VE_J */
+ regulators-7 {
+ compatible = "qcom,pm8550ve-rpmh-regulators";
+ qcom,pmic-id = "j";
+
+ vdd-l1-supply = <&vreg_s1f_0p7>;
+ vdd-l2-supply = <&vreg_s5j_1p2>;
+ vdd-l3-supply = <&vreg_s1f_0p7>;
+ vdd-s5-supply = <&vph_pwr>;
+
+ vreg_s5j_1p2: smps5 {
+ regulator-name = "vreg_s5j_1p2";
+ regulator-min-microvolt = <1256000>;
+ regulator-max-microvolt = <1304000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1j_0p8: ldo1 {
+ regulator-name = "vreg_l1j_0p8";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2j_1p2: ldo2 {
+ regulator-name = "vreg_l2j_1p2";
+ regulator-min-microvolt = <1256000>;
+ regulator-max-microvolt = <1256000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3j_0p8: ldo3 {
+ regulator-name = "vreg_l3j_0p8";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+};
+
+&pcie4 {
+ perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
+ pinctrl-0 = <&pcie4_default>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&pcie4_phy {
+ vdda-phy-supply = <&vreg_l3i_0p8>;
+ vdda-pll-supply = <&vreg_l3e_1p2>;
+
+ status = "okay";
+};
+
+&pcie6a {
+ perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+
+ pinctrl-0 = <&pcie6a_default>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&pcie6a_phy {
+ vdda-phy-supply = <&vreg_l1d_0p8>;
+ vdda-pll-supply = <&vreg_l2j_1p2>;
+
+ status = "okay";
+};
+
+&qupv3_0 {
+ status = "okay";
+};
+
+&qupv3_1 {
+ status = "okay";
+};
+
+&qupv3_2 {
+ status = "okay";
+};
+
+&remoteproc_adsp {
+ firmware-name = "qcom/hamoa-iot/adsp.mbn",
+ "qcom/hamoa-iot/adsp_dtb.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_cdsp {
+ firmware-name = "qcom/hamoa-iot/cdsp.mbn",
+ "qcom/hamoa-iot/cdsp_dtb.mbn";
+
+ status = "okay";
+};
+
+&tlmm {
+ gpio-reserved-ranges = <34 2>, /* TPM LP & INT */
+ <44 4>; /* SPI (TPM) */
+
+ pcie4_default: pcie4-default-state {
+ clkreq-n-pins {
+ pins = "gpio147";
+ function = "pcie4_clk";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ perst-n-pins {
+ pins = "gpio146";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ wake-n-pins {
+ pins = "gpio148";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ pcie6a_default: pcie6a-default-state {
+ clkreq-n-pins {
+ pins = "gpio153";
+ function = "pcie6a_clk";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ perst-n-pins {
+ pins = "gpio152";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ wake-n-pins {
+ pins = "gpio154";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+
+ };
+ };
+};
+
+&usb_1_ss0 {
+ status = "okay";
+};
+
+&usb_1_ss0_dwc3 {
+ dr_mode = "otg";
+ usb-role-switch;
+};
+
+&usb_1_ss0_hsphy {
+ vdd-supply = <&vreg_l3j_0p8>;
+ vdda12-supply = <&vreg_l2j_1p2>;
+
+ status = "okay";
+};
+
+&usb_1_ss0_qmpphy {
+ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l1j_0p8>;
+
+ status = "okay";
+};
+
+&usb_1_ss1 {
+ status = "okay";
+};
+
+&usb_1_ss1_dwc3 {
+ dr_mode = "otg";
+ usb-role-switch;
+};
+
+&usb_1_ss1_hsphy {
+ vdd-supply = <&vreg_l3j_0p8>;
+ vdda12-supply = <&vreg_l2j_1p2>;
+
+ status = "okay";
+};
+
+&usb_1_ss1_qmpphy {
+ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l2d_0p9>;
+
+ status = "okay";
+};
+
+&usb_1_ss2 {
+ status = "okay";
+};
+
+&usb_1_ss2_dwc3 {
+ dr_mode = "otg";
+ usb-role-switch;
+};
+
+&usb_1_ss2_hsphy {
+ vdd-supply = <&vreg_l3j_0p8>;
+ vdda12-supply = <&vreg_l2j_1p2>;
+
+ status = "okay";
+};
+
+&usb_1_ss2_qmpphy {
+ vdda-phy-supply = <&vreg_l2j_1p2>;
+ vdda-pll-supply = <&vreg_l2d_0p9>;
+
+ status = "okay";
+};
+
+&usb_2 {
+ status = "okay";
+};
+
+&usb_2_dwc3 {
+ dr_mode = "host";
+};
+
+&usb_2_hsphy {
+ vdd-supply = <&vreg_l2e_0p8>;
+ vdda12-supply = <&vreg_l3e_1p2>;
+
+ status = "okay";
+};
+
+&usb_mp {
+ status = "okay";
+};
+
+&usb_mp_hsphy0 {
+ vdd-supply = <&vreg_l2e_0p8>;
+ vdda12-supply = <&vreg_l3e_1p2>;
+
+ status = "okay";
+};
+
+&usb_mp_hsphy1 {
+ vdd-supply = <&vreg_l2e_0p8>;
+ vdda12-supply = <&vreg_l3e_1p2>;
+
+ status = "okay";
+};
+
+&usb_mp_qmpphy0 {
+ vdda-phy-supply = <&vreg_l3e_1p2>;
+ vdda-pll-supply = <&vreg_l3c_0p8>;
+
+ status = "okay";
+};
+
+&usb_mp_qmpphy1 {
+ vdda-phy-supply = <&vreg_l3e_1p2>;
+ vdda-pll-supply = <&vreg_l3c_0p8>;
+
+ status = "okay";
+};
--
2.34.1
On 16/07/2025 11:08, Yijie Yang wrote: > The HAMOA-IOT-SOM is a compact computing module that integrates a System > on Chip (SoC) — specifically the x1e80100 — along with essential > components optimized for IoT applications. It is designed to be mounted on > carrier boards, enabling the development of complete embedded systems. > > This change enables and overlays the following components: > - Regulators on the SOM > - Reserved memory regions > - PCIe6a and its PHY > - PCIe4 and its PHY > - USB0 through USB6 and their PHYs > - ADSP, CDSP > - WLAN, Bluetooth (M.2 interface) > > Written with contributions from Yingying Tang (added PCIe4 and its PHY to > enable WLAN). > > Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> > --- As pointed out by "arm64: dts: qcom: hamoa-iot-evk: Enable display support" this is incomplete. Adding new SoM or board is one commit. Not two. Don't split board DTS, which is already prepared/ready, into multiple fake commits. This is not a release early approach. This is opposite! Best regards, Krzysztof
On 2025-07-23 14:28, Krzysztof Kozlowski wrote: > On 16/07/2025 11:08, Yijie Yang wrote: >> The HAMOA-IOT-SOM is a compact computing module that integrates a System >> on Chip (SoC) — specifically the x1e80100 — along with essential >> components optimized for IoT applications. It is designed to be mounted on >> carrier boards, enabling the development of complete embedded systems. >> >> This change enables and overlays the following components: >> - Regulators on the SOM >> - Reserved memory regions >> - PCIe6a and its PHY >> - PCIe4 and its PHY >> - USB0 through USB6 and their PHYs >> - ADSP, CDSP >> - WLAN, Bluetooth (M.2 interface) >> >> Written with contributions from Yingying Tang (added PCIe4 and its PHY to >> enable WLAN). >> >> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> >> --- > > As pointed out by "arm64: dts: qcom: hamoa-iot-evk: Enable display > support" this is incomplete. Adding new SoM or board is one commit. Not > two. Don't split board DTS, which is already prepared/ready, into > multiple fake commits. This is not a release early approach. This is > opposite! The inclusion of display support was not intended in the initial patch, and it was not ready at the time this series was submitted. Since the display patch set was not submitted by me, its timing could not be controlled. If preferred, the display-related changes can be merged into this patch in the next revision to maintain consistency. > > Best regards, > Krzysztof -- Best Regards, Yijie
On Wed, Jul 23, 2025 at 02:44:14PM +0800, Yijie Yang wrote: > > > On 2025-07-23 14:28, Krzysztof Kozlowski wrote: > > On 16/07/2025 11:08, Yijie Yang wrote: > > > The HAMOA-IOT-SOM is a compact computing module that integrates a System > > > on Chip (SoC) — specifically the x1e80100 — along with essential > > > components optimized for IoT applications. It is designed to be mounted on > > > carrier boards, enabling the development of complete embedded systems. > > > > > > This change enables and overlays the following components: > > > - Regulators on the SOM > > > - Reserved memory regions > > > - PCIe6a and its PHY > > > - PCIe4 and its PHY > > > - USB0 through USB6 and their PHYs > > > - ADSP, CDSP > > > - WLAN, Bluetooth (M.2 interface) > > > > > > Written with contributions from Yingying Tang (added PCIe4 and its PHY to > > > enable WLAN). > > > > > > Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> > > > --- > > > > As pointed out by "arm64: dts: qcom: hamoa-iot-evk: Enable display > > support" this is incomplete. Adding new SoM or board is one commit. Not > > two. Don't split board DTS, which is already prepared/ready, into > > multiple fake commits. This is not a release early approach. This is > > opposite! > > The inclusion of display support was not intended in the initial patch, and > it was not ready at the time this series was submitted. Since the display > patch set was not submitted by me, its timing could not be controlled. If > preferred, the display-related changes can be merged into this patch in the > next revision to maintain consistency. This is neither merged nor accepted. Please squash display (and any other possible forthcoming changes) into this patchset before reposting -- With best wishes Dmitry
On 2025-07-23 19:26, Dmitry Baryshkov wrote: > On Wed, Jul 23, 2025 at 02:44:14PM +0800, Yijie Yang wrote: >> >> >> On 2025-07-23 14:28, Krzysztof Kozlowski wrote: >>> On 16/07/2025 11:08, Yijie Yang wrote: >>>> The HAMOA-IOT-SOM is a compact computing module that integrates a System >>>> on Chip (SoC) — specifically the x1e80100 — along with essential >>>> components optimized for IoT applications. It is designed to be mounted on >>>> carrier boards, enabling the development of complete embedded systems. >>>> >>>> This change enables and overlays the following components: >>>> - Regulators on the SOM >>>> - Reserved memory regions >>>> - PCIe6a and its PHY >>>> - PCIe4 and its PHY >>>> - USB0 through USB6 and their PHYs >>>> - ADSP, CDSP >>>> - WLAN, Bluetooth (M.2 interface) >>>> >>>> Written with contributions from Yingying Tang (added PCIe4 and its PHY to >>>> enable WLAN). >>>> >>>> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> >>>> --- >>> >>> As pointed out by "arm64: dts: qcom: hamoa-iot-evk: Enable display >>> support" this is incomplete. Adding new SoM or board is one commit. Not >>> two. Don't split board DTS, which is already prepared/ready, into >>> multiple fake commits. This is not a release early approach. This is >>> opposite! >> >> The inclusion of display support was not intended in the initial patch, and >> it was not ready at the time this series was submitted. Since the display >> patch set was not submitted by me, its timing could not be controlled. If >> preferred, the display-related changes can be merged into this patch in the >> next revision to maintain consistency. > > This is neither merged nor accepted. Please squash display (and any > other possible forthcoming changes) into this patchset before reposting Sure, I will. > -- Best Regards, Yijie
On Wed, Jul 16, 2025 at 05:08:41PM +0800, Yijie Yang wrote: > The HAMOA-IOT-SOM is a compact computing module that integrates a System > on Chip (SoC) — specifically the x1e80100 — along with essential > components optimized for IoT applications. It is designed to be mounted on > carrier boards, enabling the development of complete embedded systems. > > This change enables and overlays the following components: > - Regulators on the SOM > - Reserved memory regions > - PCIe6a and its PHY > - PCIe4 and its PHY > - USB0 through USB6 and their PHYs > - ADSP, CDSP > - WLAN, Bluetooth (M.2 interface) > > Written with contributions from Yingying Tang (added PCIe4 and its PHY to > enable WLAN). > > Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> > --- > arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 607 ++++++++++++++++++++++++++++ > 1 file changed, 607 insertions(+) > > +&remoteproc_adsp { > + firmware-name = "qcom/hamoa-iot/adsp.mbn", > + "qcom/hamoa-iot/adsp_dtb.mbn"; Is there a significant difference qcom/x1e80100/adsp.mbn ? If not, can we use that firmware? > + > + status = "okay"; > +}; > + > +&remoteproc_cdsp { > + firmware-name = "qcom/hamoa-iot/cdsp.mbn", > + "qcom/hamoa-iot/cdsp_dtb.mbn"; > + > + status = "okay"; > +}; > + -- With best wishes Dmitry
On 17/07/2025 20:52, Dmitry Baryshkov wrote: >> > >> +&remoteproc_adsp { >> + firmware-name = "qcom/hamoa-iot/adsp.mbn", >> + "qcom/hamoa-iot/adsp_dtb.mbn"; > > Is there a significant difference qcom/x1e80100/adsp.mbn ? If not, can > we use that firmware? Another problem is that we split FW per SoC and the SoC is x1e80100, not hamoa-iot. This patchset should not bring so many inconsistencies. It must adhere TO EXISTING rules. You don't get renames of everything just because company decided on new naming. We've been there with sa8775p. Best regards, Krzysztof
On 2025-07-18 02:52, Dmitry Baryshkov wrote: > On Wed, Jul 16, 2025 at 05:08:41PM +0800, Yijie Yang wrote: >> The HAMOA-IOT-SOM is a compact computing module that integrates a System >> on Chip (SoC) — specifically the x1e80100 — along with essential >> components optimized for IoT applications. It is designed to be mounted on >> carrier boards, enabling the development of complete embedded systems. >> >> This change enables and overlays the following components: >> - Regulators on the SOM >> - Reserved memory regions >> - PCIe6a and its PHY >> - PCIe4 and its PHY >> - USB0 through USB6 and their PHYs >> - ADSP, CDSP >> - WLAN, Bluetooth (M.2 interface) >> >> Written with contributions from Yingying Tang (added PCIe4 and its PHY to >> enable WLAN). >> >> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> >> --- >> arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 607 ++++++++++++++++++++++++++++ >> 1 file changed, 607 insertions(+) >> > >> +&remoteproc_adsp { >> + firmware-name = "qcom/hamoa-iot/adsp.mbn", >> + "qcom/hamoa-iot/adsp_dtb.mbn"; > > Is there a significant difference qcom/x1e80100/adsp.mbn ? If not, can > we use that firmware? I believe there are differences in firmware between it and the EVK, even if they’re minor. Therefore, it's better to maintain a dedicated folder for each board and move the code to the carrier board. > >> + >> + status = "okay"; >> +}; >> + >> +&remoteproc_cdsp { >> + firmware-name = "qcom/hamoa-iot/cdsp.mbn", >> + "qcom/hamoa-iot/cdsp_dtb.mbn"; >> + >> + status = "okay"; >> +}; >> + > -- Best Regards, Yijie
On Fri, Jul 18, 2025 at 02:33:50PM +0800, Yijie Yang wrote: > > > On 2025-07-18 02:52, Dmitry Baryshkov wrote: > > On Wed, Jul 16, 2025 at 05:08:41PM +0800, Yijie Yang wrote: > > > The HAMOA-IOT-SOM is a compact computing module that integrates a System > > > on Chip (SoC) — specifically the x1e80100 — along with essential > > > components optimized for IoT applications. It is designed to be mounted on > > > carrier boards, enabling the development of complete embedded systems. > > > > > > This change enables and overlays the following components: > > > - Regulators on the SOM > > > - Reserved memory regions > > > - PCIe6a and its PHY > > > - PCIe4 and its PHY > > > - USB0 through USB6 and their PHYs > > > - ADSP, CDSP > > > - WLAN, Bluetooth (M.2 interface) > > > > > > Written with contributions from Yingying Tang (added PCIe4 and its PHY to > > > enable WLAN). > > > > > > Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> > > > --- > > > arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 607 ++++++++++++++++++++++++++++ > > > 1 file changed, 607 insertions(+) > > > > > > > > +&remoteproc_adsp { > > > + firmware-name = "qcom/hamoa-iot/adsp.mbn", > > > + "qcom/hamoa-iot/adsp_dtb.mbn"; > > > > Is there a significant difference qcom/x1e80100/adsp.mbn ? If not, can > > we use that firmware? > > I believe there are differences in firmware between it and the EVK, even if > they’re minor. Therefore, it's better to maintain a dedicated folder for > each board and move the code to the carrier board. Then it's not a 'hamoa-iot'. It should be 'qcom/hamoa/iot-board-name'. Please submit the firmware to linux-firmware and also move existing x1e80100 firmware to the 'hamoa' subdir, maintaining the compatibility x1e80100 -> hamoa symlink. > > > > > > + > > > + status = "okay"; > > > +}; > > > + > > > +&remoteproc_cdsp { > > > + firmware-name = "qcom/hamoa-iot/cdsp.mbn", > > > + "qcom/hamoa-iot/cdsp_dtb.mbn"; > > > + > > > + status = "okay"; > > > +}; > > > + > > > > -- > Best Regards, > Yijie > -- With best wishes Dmitry
On 2025-07-18 17:26, Dmitry Baryshkov wrote: > On Fri, Jul 18, 2025 at 02:33:50PM +0800, Yijie Yang wrote: >> >> >> On 2025-07-18 02:52, Dmitry Baryshkov wrote: >>> On Wed, Jul 16, 2025 at 05:08:41PM +0800, Yijie Yang wrote: >>>> The HAMOA-IOT-SOM is a compact computing module that integrates a System >>>> on Chip (SoC) — specifically the x1e80100 — along with essential >>>> components optimized for IoT applications. It is designed to be mounted on >>>> carrier boards, enabling the development of complete embedded systems. >>>> >>>> This change enables and overlays the following components: >>>> - Regulators on the SOM >>>> - Reserved memory regions >>>> - PCIe6a and its PHY >>>> - PCIe4 and its PHY >>>> - USB0 through USB6 and their PHYs >>>> - ADSP, CDSP >>>> - WLAN, Bluetooth (M.2 interface) >>>> >>>> Written with contributions from Yingying Tang (added PCIe4 and its PHY to >>>> enable WLAN). >>>> >>>> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> >>>> --- >>>> arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 607 ++++++++++++++++++++++++++++ >>>> 1 file changed, 607 insertions(+) >>>> >>> >>>> +&remoteproc_adsp { >>>> + firmware-name = "qcom/hamoa-iot/adsp.mbn", >>>> + "qcom/hamoa-iot/adsp_dtb.mbn"; >>> >>> Is there a significant difference qcom/x1e80100/adsp.mbn ? If not, can >>> we use that firmware? >> >> I believe there are differences in firmware between it and the EVK, even if >> they’re minor. Therefore, it's better to maintain a dedicated folder for >> each board and move the code to the carrier board. > > Then it's not a 'hamoa-iot'. It should be 'qcom/hamoa/iot-board-name'. > Please submit the firmware to linux-firmware and also move existing > x1e80100 firmware to the 'hamoa' subdir, maintaining the compatibility > x1e80100 -> hamoa symlink. After looking into the firmware, it appears this board can use the same one as the others. I’ll keep the path consistent and avoid making major changes in this patch set. > >> >>> >>>> + >>>> + status = "okay"; >>>> +}; >>>> + >>>> +&remoteproc_cdsp { >>>> + firmware-name = "qcom/hamoa-iot/cdsp.mbn", >>>> + "qcom/hamoa-iot/cdsp_dtb.mbn"; >>>> + >>>> + status = "okay"; >>>> +}; >>>> + >>> >> >> -- >> Best Regards, >> Yijie >> > -- Best Regards, Yijie
On Wed, Jul 16, 2025 at 05:08:41PM +0800, Yijie Yang wrote: > The HAMOA-IOT-SOM is a compact computing module that integrates a System > on Chip (SoC) — specifically the x1e80100 — along with essential > components optimized for IoT applications. It is designed to be mounted on > carrier boards, enabling the development of complete embedded systems. > > This change enables and overlays the following components: > - Regulators on the SOM > - Reserved memory regions > - PCIe6a and its PHY > - PCIe4 and its PHY > - USB0 through USB6 and their PHYs > - ADSP, CDSP > - WLAN, Bluetooth (M.2 interface) There is no WLAN in here, it's part of PATCH 4/4 as far as I can tell. Move it to changelog of PATCH 4/4? > > Written with contributions from Yingying Tang (added PCIe4 and its PHY to > enable WLAN). > > Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> > --- > arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 607 ++++++++++++++++++++++++++++ > 1 file changed, 607 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi > new file mode 100644 > index 0000000000000000000000000000000000000000..dad24a6a49ad370aee48a9fd8f4a46f64c2b6348 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi > @@ -0,0 +1,607 @@ > [...] > +&remoteproc_adsp { > + firmware-name = "qcom/hamoa-iot/adsp.mbn", > + "qcom/hamoa-iot/adsp_dtb.mbn"; > + > + status = "okay"; > +}; > + > +&remoteproc_cdsp { > + firmware-name = "qcom/hamoa-iot/cdsp.mbn", > + "qcom/hamoa-iot/cdsp_dtb.mbn"; You say this SoM can be used to build "complete embedded systems", are you sure they will all use the same firwmare signatures? If not, this should be in the device-specific DT (i.e. the carrier board in your case). > [...] > +&usb_1_ss0 { > + status = "okay"; > +}; > + > +&usb_1_ss0_dwc3 { > + dr_mode = "otg"; > + usb-role-switch; > +}; > + > +&usb_1_ss0_hsphy { > + vdd-supply = <&vreg_l3j_0p8>; > + vdda12-supply = <&vreg_l2j_1p2>; > + > + status = "okay"; > +}; > + > +&usb_1_ss0_qmpphy { > + vdda-phy-supply = <&vreg_l2j_1p2>; > + vdda-pll-supply = <&vreg_l1j_0p8>; > + > + status = "okay"; > +}; > + > +&usb_1_ss1 { > + status = "okay"; > +}; > + > +&usb_1_ss1_dwc3 { > + dr_mode = "otg"; > + usb-role-switch; > +}; > + > +&usb_1_ss1_hsphy { > + vdd-supply = <&vreg_l3j_0p8>; > + vdda12-supply = <&vreg_l2j_1p2>; > + > + status = "okay"; > +}; > + > +&usb_1_ss1_qmpphy { > + vdda-phy-supply = <&vreg_l2j_1p2>; > + vdda-pll-supply = <&vreg_l2d_0p9>; > + > + status = "okay"; > +}; > + > +&usb_1_ss2 { > + status = "okay"; > +}; > + > +&usb_1_ss2_dwc3 { > + dr_mode = "otg"; > + usb-role-switch; > +}; > + > +&usb_1_ss2_hsphy { > + vdd-supply = <&vreg_l3j_0p8>; > + vdda12-supply = <&vreg_l2j_1p2>; > + > + status = "okay"; > +}; > + > +&usb_1_ss2_qmpphy { > + vdda-phy-supply = <&vreg_l2j_1p2>; > + vdda-pll-supply = <&vreg_l2d_0p9>; > + > + status = "okay"; > +}; > + > +&usb_2 { > + status = "okay"; > +}; > + > +&usb_2_dwc3 { > + dr_mode = "host"; > +}; > + > +&usb_2_hsphy { > + vdd-supply = <&vreg_l2e_0p8>; > + vdda12-supply = <&vreg_l3e_1p2>; > + > + status = "okay"; > +}; > + > +&usb_mp { > + status = "okay"; > +}; > + > +&usb_mp_hsphy0 { > + vdd-supply = <&vreg_l2e_0p8>; > + vdda12-supply = <&vreg_l3e_1p2>; > + > + status = "okay"; > +}; > + > +&usb_mp_hsphy1 { > + vdd-supply = <&vreg_l2e_0p8>; > + vdda12-supply = <&vreg_l3e_1p2>; > + > + status = "okay"; > +}; > + > +&usb_mp_qmpphy0 { > + vdda-phy-supply = <&vreg_l3e_1p2>; > + vdda-pll-supply = <&vreg_l3c_0p8>; > + > + status = "okay"; > +}; > + > +&usb_mp_qmpphy1 { > + vdda-phy-supply = <&vreg_l3e_1p2>; > + vdda-pll-supply = <&vreg_l3c_0p8>; > + > + status = "okay"; > +}; > Assuming the USB ports are located on the carrier board and not the SoM(?): Are carrier boards required to make use of all these USB ports/interfaces? In my experience it's not unusual that embedded carrier boards use only the functionality that they need. Maybe this should just set the common properties and enabling individual ports for PCIe and USB should be up to the carrier boards. Thanks, Stephan
On 2025-07-18 00:14, Stephan Gerhold wrote: > On Wed, Jul 16, 2025 at 05:08:41PM +0800, Yijie Yang wrote: >> The HAMOA-IOT-SOM is a compact computing module that integrates a System >> on Chip (SoC) — specifically the x1e80100 — along with essential >> components optimized for IoT applications. It is designed to be mounted on >> carrier boards, enabling the development of complete embedded systems. >> >> This change enables and overlays the following components: >> - Regulators on the SOM >> - Reserved memory regions >> - PCIe6a and its PHY >> - PCIe4 and its PHY >> - USB0 through USB6 and their PHYs >> - ADSP, CDSP >> - WLAN, Bluetooth (M.2 interface) > > There is no WLAN in here, it's part of PATCH 4/4 as far as I can tell. > Move it to changelog of PATCH 4/4? There is no WLAN node defined in either the DTS or DTSI files, as its power is managed by UEFI. Once PCIe4 was enabled, WLAN was enabled as well. So I think it’s better to leave it here, right? > >> >> Written with contributions from Yingying Tang (added PCIe4 and its PHY to >> enable WLAN). >> >> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> >> --- >> arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 607 ++++++++++++++++++++++++++++ >> 1 file changed, 607 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi >> new file mode 100644 >> index 0000000000000000000000000000000000000000..dad24a6a49ad370aee48a9fd8f4a46f64c2b6348 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi >> @@ -0,0 +1,607 @@ >> [...] >> +&remoteproc_adsp { >> + firmware-name = "qcom/hamoa-iot/adsp.mbn", >> + "qcom/hamoa-iot/adsp_dtb.mbn"; >> + >> + status = "okay"; >> +}; >> + >> +&remoteproc_cdsp { >> + firmware-name = "qcom/hamoa-iot/cdsp.mbn", >> + "qcom/hamoa-iot/cdsp_dtb.mbn"; > > You say this SoM can be used to build "complete embedded systems", are > you sure they will all use the same firwmare signatures? > > If not, this should be in the device-specific DT (i.e. the carrier board > in your case). You’re right. I just double-checked, and each board has its own specific firmware. I’ll remove it from the carrier board and update the path accordingly. > >> [...] >> +&usb_1_ss0 { >> + status = "okay"; >> +}; >> + >> +&usb_1_ss0_dwc3 { >> + dr_mode = "otg"; >> + usb-role-switch; >> +}; >> + >> +&usb_1_ss0_hsphy { >> + vdd-supply = <&vreg_l3j_0p8>; >> + vdda12-supply = <&vreg_l2j_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_1_ss0_qmpphy { >> + vdda-phy-supply = <&vreg_l2j_1p2>; >> + vdda-pll-supply = <&vreg_l1j_0p8>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_1_ss1 { >> + status = "okay"; >> +}; >> + >> +&usb_1_ss1_dwc3 { >> + dr_mode = "otg"; >> + usb-role-switch; >> +}; >> + >> +&usb_1_ss1_hsphy { >> + vdd-supply = <&vreg_l3j_0p8>; >> + vdda12-supply = <&vreg_l2j_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_1_ss1_qmpphy { >> + vdda-phy-supply = <&vreg_l2j_1p2>; >> + vdda-pll-supply = <&vreg_l2d_0p9>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_1_ss2 { >> + status = "okay"; >> +}; >> + >> +&usb_1_ss2_dwc3 { >> + dr_mode = "otg"; >> + usb-role-switch; >> +}; >> + >> +&usb_1_ss2_hsphy { >> + vdd-supply = <&vreg_l3j_0p8>; >> + vdda12-supply = <&vreg_l2j_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_1_ss2_qmpphy { >> + vdda-phy-supply = <&vreg_l2j_1p2>; >> + vdda-pll-supply = <&vreg_l2d_0p9>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_2 { >> + status = "okay"; >> +}; >> + >> +&usb_2_dwc3 { >> + dr_mode = "host"; >> +}; >> + >> +&usb_2_hsphy { >> + vdd-supply = <&vreg_l2e_0p8>; >> + vdda12-supply = <&vreg_l3e_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_mp { >> + status = "okay"; >> +}; >> + >> +&usb_mp_hsphy0 { >> + vdd-supply = <&vreg_l2e_0p8>; >> + vdda12-supply = <&vreg_l3e_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_mp_hsphy1 { >> + vdd-supply = <&vreg_l2e_0p8>; >> + vdda12-supply = <&vreg_l3e_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_mp_qmpphy0 { >> + vdda-phy-supply = <&vreg_l3e_1p2>; >> + vdda-pll-supply = <&vreg_l3c_0p8>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_mp_qmpphy1 { >> + vdda-phy-supply = <&vreg_l3e_1p2>; >> + vdda-pll-supply = <&vreg_l3c_0p8>; >> + >> + status = "okay"; >> +}; >> > > Assuming the USB ports are located on the carrier board and not the > SoM(?): > > Are carrier boards required to make use of all these USB > ports/interfaces? In my experience it's not unusual that embedded > carrier boards use only the functionality that they need. Maybe this > should just set the common properties and enabling individual ports for > PCIe and USB should be up to the carrier boards. > > Thanks, > Stephan -- Best Regards, Yijie
On 7/17/25 6:14 PM, Stephan Gerhold wrote: > On Wed, Jul 16, 2025 at 05:08:41PM +0800, Yijie Yang wrote: >> The HAMOA-IOT-SOM is a compact computing module that integrates a System >> on Chip (SoC) — specifically the x1e80100 — along with essential >> components optimized for IoT applications. It is designed to be mounted on >> carrier boards, enabling the development of complete embedded systems. >> >> This change enables and overlays the following components: >> - Regulators on the SOM >> - Reserved memory regions >> - PCIe6a and its PHY >> - PCIe4 and its PHY >> - USB0 through USB6 and their PHYs >> - ADSP, CDSP >> - WLAN, Bluetooth (M.2 interface) [...] >> +&usb_mp_hsphy0 { >> + vdd-supply = <&vreg_l2e_0p8>; >> + vdda12-supply = <&vreg_l3e_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_mp_hsphy1 { >> + vdd-supply = <&vreg_l2e_0p8>; >> + vdda12-supply = <&vreg_l3e_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_mp_qmpphy0 { >> + vdda-phy-supply = <&vreg_l3e_1p2>; >> + vdda-pll-supply = <&vreg_l3c_0p8>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_mp_qmpphy1 { >> + vdda-phy-supply = <&vreg_l3e_1p2>; >> + vdda-pll-supply = <&vreg_l3c_0p8>; >> + >> + status = "okay"; >> +}; >> > > Assuming the USB ports are located on the carrier board and not the > SoM(?): > > Are carrier boards required to make use of all these USB > ports/interfaces? In my experience it's not unusual that embedded > carrier boards use only the functionality that they need. Maybe this > should just set the common properties and enabling individual ports for > PCIe and USB should be up to the carrier boards. The PHYs are on the SoC and if the kernel is told they're "disabled", they may possibly be left dangling from the bootloader Konrad
On Thu, Jul 17, 2025 at 10:10:05PM +0200, Konrad Dybcio wrote: > On 7/17/25 6:14 PM, Stephan Gerhold wrote: > > On Wed, Jul 16, 2025 at 05:08:41PM +0800, Yijie Yang wrote: > >> The HAMOA-IOT-SOM is a compact computing module that integrates a System > >> on Chip (SoC) — specifically the x1e80100 — along with essential > >> components optimized for IoT applications. It is designed to be mounted on > >> carrier boards, enabling the development of complete embedded systems. > >> > >> This change enables and overlays the following components: > >> - Regulators on the SOM > >> - Reserved memory regions > >> - PCIe6a and its PHY > >> - PCIe4 and its PHY > >> - USB0 through USB6 and their PHYs > >> - ADSP, CDSP > >> - WLAN, Bluetooth (M.2 interface) > > [...] > > >> +&usb_mp_hsphy0 { > >> + vdd-supply = <&vreg_l2e_0p8>; > >> + vdda12-supply = <&vreg_l3e_1p2>; > >> + > >> + status = "okay"; > >> +}; > >> + > >> +&usb_mp_hsphy1 { > >> + vdd-supply = <&vreg_l2e_0p8>; > >> + vdda12-supply = <&vreg_l3e_1p2>; > >> + > >> + status = "okay"; > >> +}; > >> + > >> +&usb_mp_qmpphy0 { > >> + vdda-phy-supply = <&vreg_l3e_1p2>; > >> + vdda-pll-supply = <&vreg_l3c_0p8>; > >> + > >> + status = "okay"; > >> +}; > >> + > >> +&usb_mp_qmpphy1 { > >> + vdda-phy-supply = <&vreg_l3e_1p2>; > >> + vdda-pll-supply = <&vreg_l3c_0p8>; > >> + > >> + status = "okay"; > >> +}; > >> > > > > Assuming the USB ports are located on the carrier board and not the > > SoM(?): > > > > Are carrier boards required to make use of all these USB > > ports/interfaces? In my experience it's not unusual that embedded > > carrier boards use only the functionality that they need. Maybe this > > should just set the common properties and enabling individual ports for > > PCIe and USB should be up to the carrier boards. > > The PHYs are on the SoC and if the kernel is told they're "disabled", > they may possibly be left dangling from the bootloader > How is this different from any of the laptops we have upstream? If we're worried about firmware keeping unused PHYs on, then we should probably enable all the PHY nodes by default in the SoC .dtsi? Thanks, Stephan
On 2025-07-18 04:14, Stephan Gerhold wrote: > On Thu, Jul 17, 2025 at 10:10:05PM +0200, Konrad Dybcio wrote: >> On 7/17/25 6:14 PM, Stephan Gerhold wrote: >>> On Wed, Jul 16, 2025 at 05:08:41PM +0800, Yijie Yang wrote: >>>> The HAMOA-IOT-SOM is a compact computing module that integrates a System >>>> on Chip (SoC) — specifically the x1e80100 — along with essential >>>> components optimized for IoT applications. It is designed to be mounted on >>>> carrier boards, enabling the development of complete embedded systems. >>>> >>>> This change enables and overlays the following components: >>>> - Regulators on the SOM >>>> - Reserved memory regions >>>> - PCIe6a and its PHY >>>> - PCIe4 and its PHY >>>> - USB0 through USB6 and their PHYs >>>> - ADSP, CDSP >>>> - WLAN, Bluetooth (M.2 interface) >> >> [...] >> >>>> +&usb_mp_hsphy0 { >>>> + vdd-supply = <&vreg_l2e_0p8>; >>>> + vdda12-supply = <&vreg_l3e_1p2>; >>>> + >>>> + status = "okay"; >>>> +}; >>>> + >>>> +&usb_mp_hsphy1 { >>>> + vdd-supply = <&vreg_l2e_0p8>; >>>> + vdda12-supply = <&vreg_l3e_1p2>; >>>> + >>>> + status = "okay"; >>>> +}; >>>> + >>>> +&usb_mp_qmpphy0 { >>>> + vdda-phy-supply = <&vreg_l3e_1p2>; >>>> + vdda-pll-supply = <&vreg_l3c_0p8>; >>>> + >>>> + status = "okay"; >>>> +}; >>>> + >>>> +&usb_mp_qmpphy1 { >>>> + vdda-phy-supply = <&vreg_l3e_1p2>; >>>> + vdda-pll-supply = <&vreg_l3c_0p8>; >>>> + >>>> + status = "okay"; >>>> +}; >>>> >>> >>> Assuming the USB ports are located on the carrier board and not the >>> SoM(?): >>> >>> Are carrier boards required to make use of all these USB >>> ports/interfaces? In my experience it's not unusual that embedded >>> carrier boards use only the functionality that they need. Maybe this >>> should just set the common properties and enabling individual ports for >>> PCIe and USB should be up to the carrier boards. >> >> The PHYs are on the SoC and if the kernel is told they're "disabled", >> they may possibly be left dangling from the bootloader >> > > How is this different from any of the laptops we have upstream? If we're > worried about firmware keeping unused PHYs on, then we should probably > enable all the PHY nodes by default in the SoC .dtsi? Per my understanding, the SoM may be used with various types of firmware, some of which might fully initialize all USB PHYs. In contrast, laptop platforms typically rely on fixed firmware that only initializes what's necessary for boot. > > Thanks, > Stephan -- Best Regards, Yijie
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