bcm63xx SoCs have a register in the gpio controller that controls some
of the phy functionality. Some of the bits reset individual phys and 
need a driver to set. 

The other fields in the register configure phy power and will be set
by the network device driver. 

v2:
- Drop SoC specific patches since bits are sequential

v1: https://lore.kernel.org/all/20250709024740.194520-1-kylehendrydev@gmail.com/

Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>

Kyle Hendry (2):
  reset: bcm6345: add support for bcm63xx ephy control register
  dt-bindings: reset: add compatible for bcm63xx ephy control

 .../devicetree/bindings/reset/brcm,bcm6345-reset.yaml         | 4 +++-
 drivers/reset/reset-bcm6345.c                                 | 1 +
 2 files changed, 4 insertions(+), 1 deletion(-)

-- 
2.43.0