Hi James,
On 7/11/25 19:36, James Morse wrote:
> cpuhp callbacks aren't the only time the MSC configuration may need to
> be reset. Resctrl has an API call to reset a class.
> If an MPAM error interrupt arrives it indicates the driver has
> misprogrammed an MSC. The safest thing to do is reset all the MSCs
> and disable MPAM.
>
> Add a helper to reset RIS via their class. Call this from mpam_disable(),
> which can be scheduled from the error interrupt handler.
>
> Signed-off-by: James Morse <james.morse@arm.com>
> ---
> drivers/platform/arm64/mpam/mpam_devices.c | 62 ++++++++++++++++++++-
> drivers/platform/arm64/mpam/mpam_internal.h | 1 +
> 2 files changed, 61 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/platform/arm64/mpam/mpam_devices.c b/drivers/platform/arm64/mpam/mpam_devices.c
> index 2e32e54cc081..145535cd4732 100644
> --- a/drivers/platform/arm64/mpam/mpam_devices.c
> +++ b/drivers/platform/arm64/mpam/mpam_devices.c
> @@ -916,8 +916,6 @@ static int mpam_reset_ris(void *arg)
> u16 partid, partid_max;
> struct mpam_msc_ris *ris = arg;
>
> - mpam_assert_srcu_read_lock_held();
> -
> if (ris->in_reset_state)
> return 0;
>
> @@ -1575,6 +1573,66 @@ static void mpam_enable_once(void)
> READ_ONCE(mpam_partid_max) + 1, mpam_pmg_max + 1);
> }
>
> +static void mpam_reset_component_locked(struct mpam_component *comp)
> +{
> + int idx;
> + struct mpam_msc *msc;
> + struct mpam_vmsc *vmsc;
> + struct mpam_msc_ris *ris;
> +
> + might_sleep();
> + lockdep_assert_cpus_held();
> +
> + idx = srcu_read_lock(&mpam_srcu);
> + list_for_each_entry_rcu(vmsc, &comp->vmsc, comp_list) {
> + msc = vmsc->msc;
> +
> + list_for_each_entry_rcu(ris, &vmsc->ris, vmsc_list) {
> + if (!ris->in_reset_state)
> + mpam_touch_msc(msc, mpam_reset_ris, ris);
> + ris->in_reset_state = true;
> + }
> + }
> + srcu_read_unlock(&mpam_srcu, idx);
> +}
> +
> +static void mpam_reset_class_locked(struct mpam_class *class)
> +{
> + int idx;
> + struct mpam_component *comp;
> +
> + lockdep_assert_cpus_held();
> +
> + idx = srcu_read_lock(&mpam_srcu);
> + list_for_each_entry_rcu(comp, &class->components, class_list)
> + mpam_reset_component_locked(comp);
> + srcu_read_unlock(&mpam_srcu, idx);
> +}
> +
> +static void mpam_reset_class(struct mpam_class *class)
> +{
> + cpus_read_lock();
> + mpam_reset_class_locked(class);
> + cpus_read_unlock();
> +}
> +
> +/*
> + * Called in response to an error IRQ.
> + * All of MPAMs errors indicate a software bug, restore any modified
> + * controls to their reset values.
> + */
> +void mpam_disable(void)
> +{
> + int idx;
> + struct mpam_class *class;
> +
> + idx = srcu_read_lock(&mpam_srcu);
> + list_for_each_entry_srcu(class, &mpam_classes, classes_list,
> + srcu_read_lock_held(&mpam_srcu))
> + mpam_reset_class(class);
> + srcu_read_unlock(&mpam_srcu, idx);
> +}
Consider moving to the next patch where you introduce interrupt support.
> +
> /*
> * Enable mpam once all devices have been probed.
> * Scheduled by mpam_discovery_cpu_online() once all devices have been created.
> diff --git a/drivers/platform/arm64/mpam/mpam_internal.h b/drivers/platform/arm64/mpam/mpam_internal.h
> index f3cc88136524..de05eece0a31 100644
> --- a/drivers/platform/arm64/mpam/mpam_internal.h
> +++ b/drivers/platform/arm64/mpam/mpam_internal.h
> @@ -280,6 +280,7 @@ extern u8 mpam_pmg_max;
>
> /* Scheduled work callback to enable mpam once all MSC have been probed */
> void mpam_enable(struct work_struct *work);
> +void mpam_disable(void);
>
> int mpam_get_cpumask_from_cache_id(unsigned long cache_id, u32 cache_level,
> cpumask_t *affinity);
Thanks,
Ben