1. Patchew
  2. linux
  3. View series

[PATCH] arm64: dts: qcom: qcs9075-iq-9075-evk: Enable Display Port

Prahlad Valluru posted 1 patch 2 months, 3 weeks ago 
arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts | 52 ++++++++++++++++++++++++
1 file changed, 52 insertions(+)
[PATCH] arm64: dts: qcom: qcs9075-iq-9075-evk: Enable Display Port
Posted by Prahlad Valluru 2 months, 3 weeks ago 
From: Shashank Maurya <quic_ssmaurya@quicinc.com>

Enable DPTX0 and DPTX1 along with their corresponding PHYs for
qcs9075-iq-9075-evk platform.

Signed-off-by: Shashank Maurya <quic_ssmaurya@quicinc.com>
Signed-off-by: Prahlad Valluru <venkata.valluru@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts | 52 ++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts b/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts
index ab161180d1d5a670a68c0903e85f24a91faa2b71..110e08db3ad82e3aa88aa4c4ed4b2beb607385ad 100644
--- a/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts
+++ b/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts
@@ -252,6 +252,44 @@ vreg_l8e: ldo8 {
 	};
 };
 
+&mdss0 {
+	status = "okay";
+};
+
+&mdss0_dp0 {
+	status = "okay";
+	pinctrl-0 = <&dp0_hot_plug_det>;
+	pinctrl-names = "default";
+};
+
+&mdss0_dp0_out {
+	data-lanes = <0 1 2 3>;
+	link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+};
+
+&mdss0_dp0_phy {
+	status = "okay";
+	vdda-phy-supply = <&vreg_l1c>;
+	vdda-pll-supply = <&vreg_l4a>;
+};
+
+&mdss0_dp1 {
+	status = "okay";
+	pinctrl-0 = <&dp1_hot_plug_det>;
+	pinctrl-names = "default";
+};
+
+&mdss0_dp1_out {
+	data-lanes = <0 1 2 3>;
+	link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+};
+
+&mdss0_dp1_phy {
+	status = "okay";
+	vdda-phy-supply = <&vreg_l1c>;
+	vdda-pll-supply = <&vreg_l4a>;
+};
+
 &qupv3_id_1 {
 	status = "okay";
 };
@@ -260,6 +298,20 @@ &sleep_clk {
 	clock-frequency = <32768>;
 };
 
+&tlmm {
+	dp0_hot_plug_det: dp0-hot-plug-det-state {
+		pins = "gpio101";
+		function = "edp0_hot";
+		bias-disable;
+	};
+
+	dp1_hot_plug_det: dp1-hot-plug-det-state {
+		pins = "gpio102";
+		function = "edp1_hot";
+		bias-disable;
+	};
+};
+
 &uart10 {
 	compatible = "qcom,geni-debug-uart";
 	pinctrl-0 = <&qup_uart10_default>;

---
base-commit: 7f3a635117b377cb90b67757cb46de12ce8aa24e
change-id: 20250711-enable-iq9-dp-addc9c7195c9
prerequisite-message-id: <20250612155437.146925-1-quic_wasimn@quicinc.com>
prerequisite-patch-id: 22eee78c5507c3105e0c74d1128b3db803879d7a
prerequisite-patch-id: cf52fc82e606ab87458339f71596ca31253e91ee
prerequisite-patch-id: 3617ce3b1790bc5b8e50dca6c3ae482759dcc684

Best regards,
-- 
Prahlad Valluru <venkata.valluru@oss.qualcomm.com>
Re: [PATCH] arm64: dts: qcom: qcs9075-iq-9075-evk: Enable Display Port
Posted by Dmitry Baryshkov 2 months, 3 weeks ago 
On Fri, Jul 11, 2025 at 09:13:47PM +0530, Prahlad Valluru wrote:
> From: Shashank Maurya <quic_ssmaurya@quicinc.com>
> 
> Enable DPTX0 and DPTX1 along with their corresponding PHYs for
> qcs9075-iq-9075-evk platform.

Please add corresponding dp-connector devices.

> 
> Signed-off-by: Shashank Maurya <quic_ssmaurya@quicinc.com>
> Signed-off-by: Prahlad Valluru <venkata.valluru@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts | 52 ++++++++++++++++++++++++
>  1 file changed, 52 insertions(+)
> 
-- 
With best wishes
Dmitry
Re: [PATCH] arm64: dts: qcom: qcs9075-iq-9075-evk: Enable Display Port
Posted by Rob Herring (Arm) 2 months, 3 weeks ago 
On Fri, 11 Jul 2025 21:13:47 +0530, Prahlad Valluru wrote:
> From: Shashank Maurya <quic_ssmaurya@quicinc.com>
> 
> Enable DPTX0 and DPTX1 along with their corresponding PHYs for
> qcs9075-iq-9075-evk platform.
> 
> Signed-off-by: Shashank Maurya <quic_ssmaurya@quicinc.com>
> Signed-off-by: Prahlad Valluru <venkata.valluru@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts | 52 ++++++++++++++++++++++++
>  1 file changed, 52 insertions(+)
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


This patch series was applied (using b4) to base:
 Base: base-commit 7f3a635117b377cb90b67757cb46de12ce8aa24e not known, ignoring
 Base: attempting to guess base-commit...
 Base: failed to guess base
 Deps: looking for dependencies matching 3 patch-ids
 Deps: Applying prerequisite patch: [PATCH v10 1/3] dt-bindings: arm: qcom: Add bindings for QCS9075 SOC based board
 Deps: Applying prerequisite patch: [PATCH v10 2/3] arm64: dts: qcom: Add qcs9075 IoT SOC devicetree
 Deps: Applying prerequisite patch: [PATCH v10 3/3] arm64: dts: qcom: Add support for qcs9075 IQ-9075-EVK

If this is not the correct base, please add 'base-commit' tag
(or use b4 which does this automatically)

New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/qcom/' for 20250711-enable-iq9-dp-v1-1-6d381e105473@oss.qualcomm.com:

arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dtb: display-controller@ae01000 (qcom,sa8775p-dpu): clock-names:0: 'nrt_bus' was expected
	from schema $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-dpu.yaml#
arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dtb: display-controller@ae01000 (qcom,sa8775p-dpu): Unevaluated properties are not allowed ('clock-names' was unexpected)
	from schema $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-dpu.yaml#
Re: [PATCH] arm64: dts: qcom: qcs9075-iq-9075-evk: Enable Display Port
Posted by Bjorn Andersson 2 months, 3 weeks ago 
On Fri, Jul 11, 2025 at 09:13:47PM +0530, Prahlad Valluru wrote:
> From: Shashank Maurya <quic_ssmaurya@quicinc.com>
> 
> Enable DPTX0 and DPTX1 along with their corresponding PHYs for
> qcs9075-iq-9075-evk platform.

I prefer that you actually describe what these are connected to. I
presume there will be more DPTX instances enabled for this board? If
that's the case, let's mention here that this is just a subset.

> 
> Signed-off-by: Shashank Maurya <quic_ssmaurya@quicinc.com>
> Signed-off-by: Prahlad Valluru <venkata.valluru@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts | 52 ++++++++++++++++++++++++

Please wait with resubmitting this patch until the base dtsi has landed
(with its new name).

>  1 file changed, 52 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts b/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts
> index ab161180d1d5a670a68c0903e85f24a91faa2b71..110e08db3ad82e3aa88aa4c4ed4b2beb607385ad 100644
> --- a/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts
> @@ -252,6 +252,44 @@ vreg_l8e: ldo8 {
>  	};
>  };
>  
> +&mdss0 {
> +	status = "okay";
> +};
> +
> +&mdss0_dp0 {
> +	status = "okay";

status last please.

> +	pinctrl-0 = <&dp0_hot_plug_det>;
> +	pinctrl-names = "default";

I prefer that you actually describe the connectors, like I did on
sa8295p-adp. In particular if there's a bunch of connectors on this
board.

Regards,
Bjorn

> +};
> +
> +&mdss0_dp0_out {
> +	data-lanes = <0 1 2 3>;
> +	link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
> +};
> +
> +&mdss0_dp0_phy {
> +	status = "okay";
> +	vdda-phy-supply = <&vreg_l1c>;
> +	vdda-pll-supply = <&vreg_l4a>;
> +};
> +
> +&mdss0_dp1 {
> +	status = "okay";
> +	pinctrl-0 = <&dp1_hot_plug_det>;
> +	pinctrl-names = "default";
> +};
> +
> +&mdss0_dp1_out {
> +	data-lanes = <0 1 2 3>;
> +	link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
> +};
> +
> +&mdss0_dp1_phy {
> +	status = "okay";
> +	vdda-phy-supply = <&vreg_l1c>;
> +	vdda-pll-supply = <&vreg_l4a>;
> +};
> +
>  &qupv3_id_1 {
>  	status = "okay";
>  };
> @@ -260,6 +298,20 @@ &sleep_clk {
>  	clock-frequency = <32768>;
>  };
>  
> +&tlmm {
> +	dp0_hot_plug_det: dp0-hot-plug-det-state {
> +		pins = "gpio101";
> +		function = "edp0_hot";
> +		bias-disable;
> +	};
> +
> +	dp1_hot_plug_det: dp1-hot-plug-det-state {
> +		pins = "gpio102";
> +		function = "edp1_hot";
> +		bias-disable;
> +	};
> +};
> +
>  &uart10 {
>  	compatible = "qcom,geni-debug-uart";
>  	pinctrl-0 = <&qup_uart10_default>;
> 
> ---
> base-commit: 7f3a635117b377cb90b67757cb46de12ce8aa24e
> change-id: 20250711-enable-iq9-dp-addc9c7195c9
> prerequisite-message-id: <20250612155437.146925-1-quic_wasimn@quicinc.com>
> prerequisite-patch-id: 22eee78c5507c3105e0c74d1128b3db803879d7a
> prerequisite-patch-id: cf52fc82e606ab87458339f71596ca31253e91ee
> prerequisite-patch-id: 3617ce3b1790bc5b8e50dca6c3ae482759dcc684
> 
> Best regards,
> -- 
> Prahlad Valluru <venkata.valluru@oss.qualcomm.com>
>

Patchew 2.1-devel-b67e4c2

© 2016 - 2025 Red Hat, Inc.