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[PATCH v2 3/7] pinctrl: renesas: rzg2l: Unify OEN access by making pin-to-bit mapping configurable

Prabhakar posted 7 patches 2 months, 4 weeks ago
There is a newer version of this series
[PATCH v2 3/7] pinctrl: renesas: rzg2l: Unify OEN access by making pin-to-bit mapping configurable
Posted by Prabhakar 2 months, 4 weeks ago 
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Refactor the RZG2L pinctrl driver to support reuse of the common
rzg2l_read_oen() and rzg2l_write_oen() helpers across SoCs with
different output-enable (OEN) bit mappings.

Introduce a new `pin_to_oen_bit` callback in `struct rzg2l_pinctrl_data`
to allow SoCs to provide custom logic for mapping a pin to its OEN bit.
Update the generic OEN read/write paths to use this callback when present.

With this change, SoCs like RZ/G3S can reuse the common OEN handling
code by simply supplying their own `pin_to_oen_bit` implementation.
The previously duplicated `rzg3s_oen_read()` and `rzg3s_oen_write()`
functions are now removed.

This improves maintainability and prepares the driver for supporting
future SoCs with minimal duplication.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pinctrl/renesas/pinctrl-rzg2l.c | 52 +++++++------------------
 1 file changed, 13 insertions(+), 39 deletions(-)

diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index 75b5bd032659..345ee709363b 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -296,6 +296,7 @@ struct rzg2l_pinctrl_data {
 #endif
 	void (*pwpr_pfc_lock_unlock)(struct rzg2l_pinctrl *pctrl, bool lock);
 	void (*pmc_writeb)(struct rzg2l_pinctrl *pctrl, u8 val, u16 offset);
+	int (*pin_to_oen_bit)(struct rzg2l_pinctrl *pctrl, unsigned int _pin);
 	u32 (*oen_read)(struct rzg2l_pinctrl *pctrl, unsigned int _pin);
 	int (*oen_write)(struct rzg2l_pinctrl *pctrl, unsigned int _pin, u8 oen);
 	int (*hw_to_bias_param)(unsigned int val);
@@ -1070,7 +1071,9 @@ static u32 rzg2l_read_oen(struct rzg2l_pinctrl *pctrl, unsigned int _pin)
 {
 	int bit;
 
-	bit = rzg2l_pin_to_oen_bit(pctrl, _pin);
+	if (!pctrl->data->pin_to_oen_bit)
+		return 0;
+	bit = pctrl->data->pin_to_oen_bit(pctrl, _pin);
 	if (bit < 0)
 		return 0;
 
@@ -1084,9 +1087,11 @@ static int rzg2l_write_oen(struct rzg2l_pinctrl *pctrl, unsigned int _pin, u8 oe
 	int bit;
 	u8 val;
 
-	bit = rzg2l_pin_to_oen_bit(pctrl, _pin);
+	if (!pctrl->data->pin_to_oen_bit)
+		return -EINVAL;
+	bit = pctrl->data->pin_to_oen_bit(pctrl, _pin);
 	if (bit < 0)
-		return bit;
+		return -EINVAL;
 
 	spin_lock_irqsave(&pctrl->lock, flags);
 	val = readb(pctrl->base + oen_offset);
@@ -1120,40 +1125,6 @@ static int rzg3s_pin_to_oen_bit(struct rzg2l_pinctrl *pctrl, unsigned int _pin)
 	return bit;
 }
 
-static u32 rzg3s_oen_read(struct rzg2l_pinctrl *pctrl, unsigned int _pin)
-{
-	int bit;
-
-	bit = rzg3s_pin_to_oen_bit(pctrl, _pin);
-	if (bit < 0)
-		return 0;
-
-	return !(readb(pctrl->base + pctrl->data->hwcfg->regs.oen) & BIT(bit));
-}
-
-static int rzg3s_oen_write(struct rzg2l_pinctrl *pctrl, unsigned int _pin, u8 oen)
-{
-	u16 oen_offset = pctrl->data->hwcfg->regs.oen;
-	unsigned long flags;
-	int bit;
-	u8 val;
-
-	bit = rzg3s_pin_to_oen_bit(pctrl, _pin);
-	if (bit < 0)
-		return bit;
-
-	spin_lock_irqsave(&pctrl->lock, flags);
-	val = readb(pctrl->base + oen_offset);
-	if (oen)
-		val &= ~BIT(bit);
-	else
-		val |= BIT(bit);
-	writeb(val, pctrl->base + oen_offset);
-	spin_unlock_irqrestore(&pctrl->lock, flags);
-
-	return 0;
-}
-
 static int rzg2l_hw_to_bias_param(unsigned int bias)
 {
 	switch (bias) {
@@ -3310,6 +3281,7 @@ static struct rzg2l_pinctrl_data r9a07g043_data = {
 #endif
 	.pwpr_pfc_lock_unlock = &rzg2l_pwpr_pfc_lock_unlock,
 	.pmc_writeb = &rzg2l_pmc_writeb,
+	.pin_to_oen_bit = &rzg2l_pin_to_oen_bit,
 	.oen_read = &rzg2l_read_oen,
 	.oen_write = &rzg2l_write_oen,
 	.hw_to_bias_param = &rzg2l_hw_to_bias_param,
@@ -3327,6 +3299,7 @@ static struct rzg2l_pinctrl_data r9a07g044_data = {
 	.hwcfg = &rzg2l_hwcfg,
 	.pwpr_pfc_lock_unlock = &rzg2l_pwpr_pfc_lock_unlock,
 	.pmc_writeb = &rzg2l_pmc_writeb,
+	.pin_to_oen_bit = &rzg2l_pin_to_oen_bit,
 	.oen_read = &rzg2l_read_oen,
 	.oen_write = &rzg2l_write_oen,
 	.hw_to_bias_param = &rzg2l_hw_to_bias_param,
@@ -3343,8 +3316,9 @@ static struct rzg2l_pinctrl_data r9a08g045_data = {
 	.hwcfg = &rzg3s_hwcfg,
 	.pwpr_pfc_lock_unlock = &rzg2l_pwpr_pfc_lock_unlock,
 	.pmc_writeb = &rzg2l_pmc_writeb,
-	.oen_read = &rzg3s_oen_read,
-	.oen_write = &rzg3s_oen_write,
+	.pin_to_oen_bit = &rzg3s_pin_to_oen_bit,
+	.oen_read = &rzg2l_read_oen,
+	.oen_write = &rzg2l_write_oen,
 	.hw_to_bias_param = &rzg2l_hw_to_bias_param,
 	.bias_param_to_hw = &rzg2l_bias_param_to_hw,
 };
-- 
2.49.0
Re: [PATCH v2 3/7] pinctrl: renesas: rzg2l: Unify OEN access by making pin-to-bit mapping configurable
Posted by Geert Uytterhoeven 2 months ago 
Hi Prabhakar,

On Wed, 9 Jul 2025 at 18:08, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Refactor the RZG2L pinctrl driver to support reuse of the common
> rzg2l_read_oen() and rzg2l_write_oen() helpers across SoCs with
> different output-enable (OEN) bit mappings.
>
> Introduce a new `pin_to_oen_bit` callback in `struct rzg2l_pinctrl_data`
> to allow SoCs to provide custom logic for mapping a pin to its OEN bit.
> Update the generic OEN read/write paths to use this callback when present.
>
> With this change, SoCs like RZ/G3S can reuse the common OEN handling
> code by simply supplying their own `pin_to_oen_bit` implementation.
> The previously duplicated `rzg3s_oen_read()` and `rzg3s_oen_write()`
> functions are now removed.
>
> This improves maintainability and prepares the driver for supporting
> future SoCs with minimal duplication.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch!

> --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> @@ -296,6 +296,7 @@ struct rzg2l_pinctrl_data {
>  #endif
>         void (*pwpr_pfc_lock_unlock)(struct rzg2l_pinctrl *pctrl, bool lock);
>         void (*pmc_writeb)(struct rzg2l_pinctrl *pctrl, u8 val, u16 offset);
> +       int (*pin_to_oen_bit)(struct rzg2l_pinctrl *pctrl, unsigned int _pin);
>         u32 (*oen_read)(struct rzg2l_pinctrl *pctrl, unsigned int _pin);
>         int (*oen_write)(struct rzg2l_pinctrl *pctrl, unsigned int _pin, u8 oen);
>         int (*hw_to_bias_param)(unsigned int val);
> @@ -1070,7 +1071,9 @@ static u32 rzg2l_read_oen(struct rzg2l_pinctrl *pctrl, unsigned int _pin)
>  {
>         int bit;
>
> -       bit = rzg2l_pin_to_oen_bit(pctrl, _pin);
> +       if (!pctrl->data->pin_to_oen_bit)
> +               return 0;

Please add a blank line.

> +       bit = pctrl->data->pin_to_oen_bit(pctrl, _pin);
>         if (bit < 0)
>                 return 0;
>
> @@ -1084,9 +1087,11 @@ static int rzg2l_write_oen(struct rzg2l_pinctrl *pctrl, unsigned int _pin, u8 oe
>         int bit;
>         u8 val;
>
> -       bit = rzg2l_pin_to_oen_bit(pctrl, _pin);
> +       if (!pctrl->data->pin_to_oen_bit)
> +               return -EINVAL;

Likewise.


> +       bit = pctrl->data->pin_to_oen_bit(pctrl, _pin);
>         if (bit < 0)
> -               return bit;
> +               return -EINVAL;
>
>         spin_lock_irqsave(&pctrl->lock, flags);
>         val = readb(pctrl->base + oen_offset);

The rest LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Re: [PATCH v2 3/7] pinctrl: renesas: rzg2l: Unify OEN access by making pin-to-bit mapping configurable
Posted by Lad, Prabhakar 2 months ago 
Hi Geert,

Thank you for the review.

On Wed, Aug 6, 2025 at 1:55 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Wed, 9 Jul 2025 at 18:08, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Refactor the RZG2L pinctrl driver to support reuse of the common
> > rzg2l_read_oen() and rzg2l_write_oen() helpers across SoCs with
> > different output-enable (OEN) bit mappings.
> >
> > Introduce a new `pin_to_oen_bit` callback in `struct rzg2l_pinctrl_data`
> > to allow SoCs to provide custom logic for mapping a pin to its OEN bit.
> > Update the generic OEN read/write paths to use this callback when present.
> >
> > With this change, SoCs like RZ/G3S can reuse the common OEN handling
> > code by simply supplying their own `pin_to_oen_bit` implementation.
> > The previously duplicated `rzg3s_oen_read()` and `rzg3s_oen_write()`
> > functions are now removed.
> >
> > This improves maintainability and prepares the driver for supporting
> > future SoCs with minimal duplication.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > @@ -296,6 +296,7 @@ struct rzg2l_pinctrl_data {
> >  #endif
> >         void (*pwpr_pfc_lock_unlock)(struct rzg2l_pinctrl *pctrl, bool lock);
> >         void (*pmc_writeb)(struct rzg2l_pinctrl *pctrl, u8 val, u16 offset);
> > +       int (*pin_to_oen_bit)(struct rzg2l_pinctrl *pctrl, unsigned int _pin);
> >         u32 (*oen_read)(struct rzg2l_pinctrl *pctrl, unsigned int _pin);
> >         int (*oen_write)(struct rzg2l_pinctrl *pctrl, unsigned int _pin, u8 oen);
> >         int (*hw_to_bias_param)(unsigned int val);
> > @@ -1070,7 +1071,9 @@ static u32 rzg2l_read_oen(struct rzg2l_pinctrl *pctrl, unsigned int _pin)
> >  {
> >         int bit;
> >
> > -       bit = rzg2l_pin_to_oen_bit(pctrl, _pin);
> > +       if (!pctrl->data->pin_to_oen_bit)
> > +               return 0;
>
> Please add a blank line.
>
Ok, I will add a blank line here.

> > +       bit = pctrl->data->pin_to_oen_bit(pctrl, _pin);
> >         if (bit < 0)
> >                 return 0;
> >
> > @@ -1084,9 +1087,11 @@ static int rzg2l_write_oen(struct rzg2l_pinctrl *pctrl, unsigned int _pin, u8 oe
> >         int bit;
> >         u8 val;
> >
> > -       bit = rzg2l_pin_to_oen_bit(pctrl, _pin);
> > +       if (!pctrl->data->pin_to_oen_bit)
> > +               return -EINVAL;
>
> Likewise.
>
ditto.

Cheers,
Prabhakar

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