[RFC PATCH v8 26/35] x86/sev: Initialize VGIF for secondary VCPUs for Secure AVIC

Neeraj Upadhyay posted 35 patches 3 months ago
There is a newer version of this series
[RFC PATCH v8 26/35] x86/sev: Initialize VGIF for secondary VCPUs for Secure AVIC
Posted by Neeraj Upadhyay 3 months ago
From: Kishon Vijay Abraham I <kvijayab@amd.com>

Secure AVIC requires VGIF to be configured in VMSA. Configure
for secondary CPUs (the configuration for boot CPU is done by
the hypervisor).

Signed-off-by: Kishon Vijay Abraham I <kvijayab@amd.com>
Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
---
Changes since v7:
 - No change.

 arch/x86/coco/sev/core.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c
index 3f64ed6bd1e6..e341d6239326 100644
--- a/arch/x86/coco/sev/core.c
+++ b/arch/x86/coco/sev/core.c
@@ -951,6 +951,9 @@ static int wakeup_cpu_via_vmgexit(u32 apic_id, unsigned long start_ip, unsigned
 	vmsa->x87_ftw		= AP_INIT_X87_FTW_DEFAULT;
 	vmsa->x87_fcw		= AP_INIT_X87_FCW_DEFAULT;
 
+	if (cc_platform_has(CC_ATTR_SNP_SECURE_AVIC))
+		vmsa->vintr_ctrl	|= V_GIF_MASK;
+
 	/* SVME must be set. */
 	vmsa->efer		= EFER_SVME;
 
-- 
2.34.1
Re: [RFC PATCH v8 26/35] x86/sev: Initialize VGIF for secondary VCPUs for Secure AVIC
Posted by Tianyu Lan 2 months, 3 weeks ago
On Wed, Jul 9, 2025 at 11:42 AM Neeraj Upadhyay <Neeraj.Upadhyay@amd.com> wrote:
>
> From: Kishon Vijay Abraham I <kvijayab@amd.com>
>
> Secure AVIC requires VGIF to be configured in VMSA. Configure
> for secondary CPUs (the configuration for boot CPU is done by
> the hypervisor).
>
> Signed-off-by: Kishon Vijay Abraham I <kvijayab@amd.com>
> Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
> ---
> Changes since v7:
>  - No change.


Reviewed-by: Tianyu Lan <tiala@microsoft.com>
--
Thanks
Tianyu Lan