[PATCH] arm64: dts: lx2160a-qds: add the two on-board RGMII PHYs

Ioana Ciornei posted 1 patch 3 months ago
.../boot/dts/freescale/fsl-lx2160a-qds.dts    | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
[PATCH] arm64: dts: lx2160a-qds: add the two on-board RGMII PHYs
Posted by Ioana Ciornei 3 months ago
Describe the two LX2160AQDS on-board RGMII PHYs on their respective MDIO
buses behind the MDIO multiplexer.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
 .../boot/dts/freescale/fsl-lx2160a-qds.dts    | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
index 4d721197d837..2d01e20b47e7 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
@@ -43,12 +43,22 @@ mdio@0 { /* On-board PHY #1 RGMI1*/
 			reg = <0x00>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+
+			rgmii_phy1: ethernet-phy@1 {
+				compatible = "ethernet-phy-id001c.c916";
+				reg = <0x1>;
+			};
 		};
 
 		mdio@8 { /* On-board PHY #2 RGMI2*/
 			reg = <0x8>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+
+			rgmii_phy2: ethernet-phy@2 {
+				compatible = "ethernet-phy-id001c.c916";
+				reg = <0x2>;
+			};
 		};
 
 		mdio@18 { /* Slot #1 */
@@ -169,6 +179,16 @@ &crypto {
 	status = "okay";
 };
 
+&dpmac17 {
+	phy-handle = <&rgmii_phy1>;
+	phy-connection-type = "rgmii-id";
+};
+
+&dpmac18 {
+	phy-handle = <&rgmii_phy2>;
+	phy-connection-type = "rgmii-id";
+};
+
 &dspi0 {
 	status = "okay";
 
-- 
2.25.1
Re: [PATCH] arm64: dts: lx2160a-qds: add the two on-board RGMII PHYs
Posted by Shawn Guo 2 months, 4 weeks ago
On Mon, Jul 07, 2025 at 06:33:31PM +0300, Ioana Ciornei wrote:
> Describe the two LX2160AQDS on-board RGMII PHYs on their respective MDIO
> buses behind the MDIO multiplexer.
> 
> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>

Applied, thanks!
Re: [PATCH] arm64: dts: lx2160a-qds: add the two on-board RGMII PHYs
Posted by Frank Li 3 months ago
On Mon, Jul 07, 2025 at 06:33:31PM +0300, Ioana Ciornei wrote:
> Describe the two LX2160AQDS on-board RGMII PHYs on their respective MDIO
> buses behind the MDIO multiplexer.
>
> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  .../boot/dts/freescale/fsl-lx2160a-qds.dts    | 20 +++++++++++++++++++
>  1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> index 4d721197d837..2d01e20b47e7 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> @@ -43,12 +43,22 @@ mdio@0 { /* On-board PHY #1 RGMI1*/
>  			reg = <0x00>;
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> +
> +			rgmii_phy1: ethernet-phy@1 {
> +				compatible = "ethernet-phy-id001c.c916";
> +				reg = <0x1>;
> +			};
>  		};
>
>  		mdio@8 { /* On-board PHY #2 RGMI2*/
>  			reg = <0x8>;
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> +
> +			rgmii_phy2: ethernet-phy@2 {
> +				compatible = "ethernet-phy-id001c.c916";
> +				reg = <0x2>;
> +			};
>  		};
>
>  		mdio@18 { /* Slot #1 */
> @@ -169,6 +179,16 @@ &crypto {
>  	status = "okay";
>  };
>
> +&dpmac17 {
> +	phy-handle = <&rgmii_phy1>;
> +	phy-connection-type = "rgmii-id";
> +};
> +
> +&dpmac18 {
> +	phy-handle = <&rgmii_phy2>;
> +	phy-connection-type = "rgmii-id";
> +};
> +
>  &dspi0 {
>  	status = "okay";
>
> --
> 2.25.1
>