From: Frank Li <Frank.Li@nxp.com>
Add #address-cells and #szie-cells for spi flash controller to fix below
CHECK_DTB warning:
arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi:103.23-112.5: Warning (spi_bus_bridge): /soc/spi@40003000: incorrect #address-cells for SPI bus
also defined at arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts:452.8-479.3
arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi:103.23-112.5: Warning (spi_bus_bridge): /soc/spi@40003000: incorrect #size-cells for SPI bus
also defined at arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts:452.8-479.3
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi
index 0be2486f07173c47bdc9d298a11ac9347f81cf02..d212ca252b06dc97a0cdbe5ecff42780b51a02dd 100644
--- a/arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi
+++ b/arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi
@@ -107,6 +107,8 @@ spifi: spi@40003000 {
interrupts = <30>;
clocks = <&ccu1 CLK_SPIFI>, <&ccu1 CLK_CPU_SPIFI>;
clock-names = "spifi", "reg";
+ #address-cells = <1>;
+ #size-cells = <0>;
resets = <&rgu 53>;
status = "disabled";
};
--
2.34.1