From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Hi all,

This patch series adds XSPI support to the Renesas RZ/V2N (R9A09G056)
and RZ/V2H(P) (R9A09G057) SoCs. It introduces the XSPI controller nodes
in the SoC-level DTSI files and enables a connected serial NOR flash
device on the respective evaluation boards.

Note,
- DT binding patches have been posted seprately [0]


[0] https://lore.kernel.org/all/20250624171605.469724-1-prabhakar.mahadev-lad.rj@bp.renesas.com/

v1->v2:
- Added Reviewed-by tags from Geert
- Moved assigned-clocks and assigned-clock-rates properties to board DTS

Cheers,
Prabhakar

Lad Prabhakar (4):
  arm64: dts: renesas: r9a09g056: Add XSPI node
  arm64: dts: renesas: r9a09g057: Add XSPI node
  arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable serial NOR FLASH
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable serial NOR FLASH

 arch/arm64/boot/dts/renesas/r9a09g056.dtsi    | 21 +++++++
 .../dts/renesas/r9a09g056n48-rzv2n-evk.dts    | 55 +++++++++++++++++++
 arch/arm64/boot/dts/renesas/r9a09g057.dtsi    | 21 +++++++
 .../dts/renesas/r9a09g057h44-rzv2h-evk.dts    | 55 +++++++++++++++++++
 4 files changed, 152 insertions(+)

-- 
2.49.0

Hi Prabhakar,

On Fri, 4 Jul 2025 at 16:08, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> This patch series adds XSPI support to the Renesas RZ/V2N (R9A09G056)
> and RZ/V2H(P) (R9A09G057) SoCs. It introduces the XSPI controller nodes
> in the SoC-level DTSI files and enables a connected serial NOR flash
> device on the respective evaluation boards.
>
> Note,
> - DT binding patches have been posted seprately [0]
>
>
> [0] https://lore.kernel.org/all/20250624171605.469724-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
>
> v1->v2:
> - Added Reviewed-by tags from Geert
> - Moved assigned-clocks and assigned-clock-rates properties to board DTS

Thanks, will queue in renesas-devel for v6.17.

    * MT25QU512ABB8E12 flash chip is capable of running at 166MHz
    * clock frequency. Set the maximum clock frequency to 133MHz
    * supported by the RZ/V2N SoC.

Shouldn't that be:

    * MT25QU512ABB8E12 flash chip is capable of running at 166MHz
    * clock frequency. Set the clock frequency to the maximum 133MHz
    * supported by the RZ/V2N SoC.

? Or am I misunderstanding?

Thanks!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Hi Geert,

On Mon, Jul 7, 2025 at 2:13 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Fri, 4 Jul 2025 at 16:08, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > This patch series adds XSPI support to the Renesas RZ/V2N (R9A09G056)
> > and RZ/V2H(P) (R9A09G057) SoCs. It introduces the XSPI controller nodes
> > in the SoC-level DTSI files and enables a connected serial NOR flash
> > device on the respective evaluation boards.
> >
> > Note,
> > - DT binding patches have been posted seprately [0]
> >
> >
> > [0] https://lore.kernel.org/all/20250624171605.469724-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
> >
> > v1->v2:
> > - Added Reviewed-by tags from Geert
> > - Moved assigned-clocks and assigned-clock-rates properties to board DTS
>
> Thanks, will queue in renesas-devel for v6.17.
>
>     * MT25QU512ABB8E12 flash chip is capable of running at 166MHz
>     * clock frequency. Set the maximum clock frequency to 133MHz
>     * supported by the RZ/V2N SoC.
>
> Shouldn't that be:
>
>     * MT25QU512ABB8E12 flash chip is capable of running at 166MHz
>     * clock frequency. Set the clock frequency to the maximum 133MHz
>     * supported by the RZ/V2N SoC.
>
I agree that the above makes it clearer. Thank you for taking care of it.

Cheers,
Prabhakar