In preparation to support the CEC interface of the DesignWare HDMI QP IP
block, extend the platform data to provide the required IRQ number.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 4 ++++
include/drm/bridge/dw_hdmi_qp.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
index 7d531b6f4c098c6c548788dad487ce4613a2f32b..126e556025961e8645f3567b4d7a1c73cc2f2e7f 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
@@ -539,6 +539,10 @@ static int dw_hdmi_qp_rockchip_bind(struct device *dev, struct device *master,
if (plat_data.main_irq < 0)
return plat_data.main_irq;
+ plat_data.cec_irq = platform_get_irq_byname(pdev, "cec");
+ if (plat_data.cec_irq < 0)
+ return plat_data.cec_irq;
+
irq = platform_get_irq_byname(pdev, "hpd");
if (irq < 0)
return irq;
diff --git a/include/drm/bridge/dw_hdmi_qp.h b/include/drm/bridge/dw_hdmi_qp.h
index e9be6d507ad9cdc55f5c7d6d3ef37eba41f1ce74..b4a9b739734ec7b67013b683fe6017551aa19172 100644
--- a/include/drm/bridge/dw_hdmi_qp.h
+++ b/include/drm/bridge/dw_hdmi_qp.h
@@ -23,6 +23,7 @@ struct dw_hdmi_qp_plat_data {
const struct dw_hdmi_qp_phy_ops *phy_ops;
void *phy_data;
int main_irq;
+ int cec_irq;
};
struct dw_hdmi_qp *dw_hdmi_qp_bind(struct platform_device *pdev,
--
2.50.0
Hi Cristian, Am Freitag, 4. Juli 2025, 16:23:22 Mitteleuropäische Sommerzeit schrieb Cristian Ciocaltea: > In preparation to support the CEC interface of the DesignWare HDMI QP IP > block, extend the platform data to provide the required IRQ number. > > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> > --- > drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 4 ++++ > include/drm/bridge/dw_hdmi_qp.h | 1 + > 2 files changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c > index 7d531b6f4c098c6c548788dad487ce4613a2f32b..126e556025961e8645f3567b4d7a1c73cc2f2e7f 100644 > --- a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c > +++ b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c > @@ -539,6 +539,10 @@ static int dw_hdmi_qp_rockchip_bind(struct device *dev, struct device *master, > if (plat_data.main_irq < 0) > return plat_data.main_irq; > > + plat_data.cec_irq = platform_get_irq_byname(pdev, "cec"); > + if (plat_data.cec_irq < 0) > + return plat_data.cec_irq; > + > irq = platform_get_irq_byname(pdev, "hpd"); > if (irq < 0) > return irq; > diff --git a/include/drm/bridge/dw_hdmi_qp.h b/include/drm/bridge/dw_hdmi_qp.h > index e9be6d507ad9cdc55f5c7d6d3ef37eba41f1ce74..b4a9b739734ec7b67013b683fe6017551aa19172 100644 > --- a/include/drm/bridge/dw_hdmi_qp.h > +++ b/include/drm/bridge/dw_hdmi_qp.h > @@ -23,6 +23,7 @@ struct dw_hdmi_qp_plat_data { > const struct dw_hdmi_qp_phy_ops *phy_ops; > void *phy_data; > int main_irq; > + int cec_irq; > }; from a structure point-of-view, I'd expect the series to be something like: (1) drm/bridge: dw-hdmi-qp: Add CEC support -> including adding the cec_irq to dw_hdmi_qp_plat_data (2) drm/bridge: dw-hdmi-qp: Fixup timer base setup -> including adding the ref_clk_rate to dw_hdmi_qp_plat_data (3) drm/rockchip: dw_hdmi_qp: Provide CEC IRQ in dw_hdmi_qp_plat_data (4) drm/rockchip: dw_hdmi_qp: Provide ref clock rate in dw_hdmi_qp_plat_data (5) arm64: defconfig: Enable DW HDMI QP CEC support The patches adding the generic functionality to the bridge should also include the needed elements and not depend on platform-specific patches. Heiko
Hi Heiko, On 7/4/25 5:37 PM, Heiko Stübner wrote: > Hi Cristian, > > Am Freitag, 4. Juli 2025, 16:23:22 Mitteleuropäische Sommerzeit schrieb Cristian Ciocaltea: >> In preparation to support the CEC interface of the DesignWare HDMI QP IP >> block, extend the platform data to provide the required IRQ number. >> >> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> >> --- >> drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 4 ++++ >> include/drm/bridge/dw_hdmi_qp.h | 1 + >> 2 files changed, 5 insertions(+) >> >> diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c >> index 7d531b6f4c098c6c548788dad487ce4613a2f32b..126e556025961e8645f3567b4d7a1c73cc2f2e7f 100644 >> --- a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c >> +++ b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c >> @@ -539,6 +539,10 @@ static int dw_hdmi_qp_rockchip_bind(struct device *dev, struct device *master, >> if (plat_data.main_irq < 0) >> return plat_data.main_irq; >> >> + plat_data.cec_irq = platform_get_irq_byname(pdev, "cec"); >> + if (plat_data.cec_irq < 0) >> + return plat_data.cec_irq; >> + >> irq = platform_get_irq_byname(pdev, "hpd"); >> if (irq < 0) >> return irq; >> diff --git a/include/drm/bridge/dw_hdmi_qp.h b/include/drm/bridge/dw_hdmi_qp.h >> index e9be6d507ad9cdc55f5c7d6d3ef37eba41f1ce74..b4a9b739734ec7b67013b683fe6017551aa19172 100644 >> --- a/include/drm/bridge/dw_hdmi_qp.h >> +++ b/include/drm/bridge/dw_hdmi_qp.h >> @@ -23,6 +23,7 @@ struct dw_hdmi_qp_plat_data { >> const struct dw_hdmi_qp_phy_ops *phy_ops; >> void *phy_data; >> int main_irq; >> + int cec_irq; >> }; > > from a structure point-of-view, I'd expect the series to be something like: > > (1) drm/bridge: dw-hdmi-qp: Add CEC support > -> including adding the cec_irq to dw_hdmi_qp_plat_data > (2) drm/bridge: dw-hdmi-qp: Fixup timer base setup > -> including adding the ref_clk_rate to dw_hdmi_qp_plat_data > (3) drm/rockchip: dw_hdmi_qp: Provide CEC IRQ in dw_hdmi_qp_plat_data > (4) drm/rockchip: dw_hdmi_qp: Provide ref clock rate in dw_hdmi_qp_plat_data > (5) arm64: defconfig: Enable DW HDMI QP CEC support > > The patches adding the generic functionality to the bridge should also > include the needed elements and not depend on platform-specific patches. You are right, that's a much better approach. Thanks for the quick feedback! Regards, Cristian
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