arch/x86/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Only select ARCH_WANT_HUGE_PMD_SHARE on 64-bit x86.
Page table sharing requires at least three levels because it involves
shared references to PMD tables; 32-bit x86 has either two-level paging
(without PAE) or three-level paging (with PAE), but even with
three-level paging, having a dedicated PGD entry for hugetlb is only
barely possible (because the PGD only has four entries), and it seems
unlikely anyone's actually using PMD sharing on 32-bit.
Having ARCH_WANT_HUGE_PMD_SHARE enabled on non-PAE 32-bit X86 (which
has 2-level paging) became particularly problematic after commit
59d9094df3d7 ("mm: hugetlb: independent PMD page table shared count"),
since that changes `struct ptdesc` such that the `pt_mm` (for PGDs) and
the `pt_share_count` (for PMDs) share the same union storage - and with
2-level paging, PMDs are PGDs.
(For comparison, arm64 also gates ARCH_WANT_HUGE_PMD_SHARE on the
configuration of page tables such that it is never enabled with 2-level
paging.)
Reported-by: Vitaly Chikunov <vt@altlinux.org>
Closes: https://lore.kernel.org/r/srhpjxlqfna67blvma5frmy3aa@altlinux.org
Suggested-by: Dave Hansen <dave.hansen@intel.com>
Tested-by: Vitaly Chikunov <vt@altlinux.org>
Fixes: cfe28c5d63d8 ("x86: mm: Remove x86 version of huge_pmd_share.")
Cc: stable@vger.kernel.org
Signed-off-by: Jann Horn <jannh@google.com>
---
I'm carrying over Vitaly Chikunov's "Tested-by" from v1.
Changes in v2:
- disable it for 32-bit entirely (Dave Hansen)
- Link to v1: https://lore.kernel.org/r/20250630-x86-2level-hugetlb-v1-1-077cd53d8255@google.com
---
arch/x86/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 71019b3b54ea..4e0fe688cc83 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -147,7 +147,7 @@ config X86
select ARCH_WANTS_DYNAMIC_TASK_STRUCT
select ARCH_WANTS_NO_INSTR
select ARCH_WANT_GENERAL_HUGETLB
- select ARCH_WANT_HUGE_PMD_SHARE
+ select ARCH_WANT_HUGE_PMD_SHARE if X86_64
select ARCH_WANT_LD_ORPHAN_WARN
select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP if X86_64
select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP if X86_64
---
base-commit: d0b3b7b22dfa1f4b515fd3a295b3fd958f9e81af
change-id: 20250630-x86-2level-hugetlb-b1d8feb255ce
--
Jann Horn <jannh@google.com>
On 02.07.25 10:32, Jann Horn wrote: > Only select ARCH_WANT_HUGE_PMD_SHARE on 64-bit x86. > Page table sharing requires at least three levels because it involves > shared references to PMD tables; 32-bit x86 has either two-level paging > (without PAE) or three-level paging (with PAE), but even with > three-level paging, having a dedicated PGD entry for hugetlb is only > barely possible (because the PGD only has four entries), and it seems > unlikely anyone's actually using PMD sharing on 32-bit. > > Having ARCH_WANT_HUGE_PMD_SHARE enabled on non-PAE 32-bit X86 (which > has 2-level paging) became particularly problematic after commit > 59d9094df3d7 ("mm: hugetlb: independent PMD page table shared count"), > since that changes `struct ptdesc` such that the `pt_mm` (for PGDs) and > the `pt_share_count` (for PMDs) share the same union storage - and with > 2-level paging, PMDs are PGDs. > > (For comparison, arm64 also gates ARCH_WANT_HUGE_PMD_SHARE on the > configuration of page tables such that it is never enabled with 2-level > paging.) > > Reported-by: Vitaly Chikunov <vt@altlinux.org> > Closes: https://lore.kernel.org/r/srhpjxlqfna67blvma5frmy3aa@altlinux.org > Suggested-by: Dave Hansen <dave.hansen@intel.com> > Tested-by: Vitaly Chikunov <vt@altlinux.org> > Fixes: cfe28c5d63d8 ("x86: mm: Remove x86 version of huge_pmd_share.") > Cc: stable@vger.kernel.org > Signed-off-by: Jann Horn <jannh@google.com> > --- Acked-by: David Hildenbrand <david@redhat.com> -- Cheers, David / dhildenb
On Wed, Jul 02, 2025 at 10:32:04AM +0200, Jann Horn wrote: > Only select ARCH_WANT_HUGE_PMD_SHARE on 64-bit x86. > Page table sharing requires at least three levels because it involves > shared references to PMD tables; 32-bit x86 has either two-level paging > (without PAE) or three-level paging (with PAE), but even with > three-level paging, having a dedicated PGD entry for hugetlb is only > barely possible (because the PGD only has four entries), and it seems > unlikely anyone's actually using PMD sharing on 32-bit. > > Having ARCH_WANT_HUGE_PMD_SHARE enabled on non-PAE 32-bit X86 (which > has 2-level paging) became particularly problematic after commit > 59d9094df3d7 ("mm: hugetlb: independent PMD page table shared count"), > since that changes `struct ptdesc` such that the `pt_mm` (for PGDs) and > the `pt_share_count` (for PMDs) share the same union storage - and with > 2-level paging, PMDs are PGDs. > > (For comparison, arm64 also gates ARCH_WANT_HUGE_PMD_SHARE on the > configuration of page tables such that it is never enabled with 2-level > paging.) > > Reported-by: Vitaly Chikunov <vt@altlinux.org> > Closes: https://lore.kernel.org/r/srhpjxlqfna67blvma5frmy3aa@altlinux.org > Suggested-by: Dave Hansen <dave.hansen@intel.com> > Tested-by: Vitaly Chikunov <vt@altlinux.org> > Fixes: cfe28c5d63d8 ("x86: mm: Remove x86 version of huge_pmd_share.") > Cc: stable@vger.kernel.org > Signed-off-by: Jann Horn <jannh@google.com> Acked-by: Oscar Salvador <osalvador@suse.de> Thanks! -- Oscar Salvador SUSE Labs
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