Add nodes for LVDS/DISPLAY CSR.
Add ldb_pll_div7 node which is used for clock source of DISPLAY CSR.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx943.dtsi | 34 +++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx943.dtsi b/arch/arm64/boot/dts/freescale/imx943.dtsi
index 45b8da758e87771c0775eb799ce2da3aac37c060..cf67dba21e4f6f27fff7e5d29744086e4ec9c021 100644
--- a/arch/arm64/boot/dts/freescale/imx943.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx943.dtsi
@@ -3,6 +3,8 @@
* Copyright 2025 NXP
*/
+#include <dt-bindings/clock/nxp,imx94-clock.h>
+
#include "imx94.dtsi"
/ {
@@ -145,4 +147,36 @@ l3_cache: l3-cache {
cache-unified;
};
};
+
+ ldb_pll_pixel: ldb_pll_div7 {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&scmi_clk IMX94_CLK_LDBPLL>;
+ clock-div = <7>;
+ clock-mult = <1>;
+ clock-output-names = "ldb_pll_div7";
+ };
+
+ soc {
+ dispmix_csr: syscon@4b010000 {
+ compatible = "nxp,imx94-display-csr", "syscon";
+ reg = <0x0 0x4b010000 0x0 0x10000>;
+ clocks = <&scmi_clk IMX94_CLK_DISPAPB>;
+ #clock-cells = <1>;
+ power-domains = <&scmi_devpd IMX94_PD_DISPLAY>;
+ assigned-clocks = <&scmi_clk IMX94_CLK_DISPAXI>,
+ <&scmi_clk IMX94_CLK_DISPAPB>;
+ assigned-clock-parents = <&scmi_clk IMX94_CLK_SYSPLL1_PFD1>,
+ <&scmi_clk IMX94_CLK_SYSPLL1_PFD1_DIV2>;
+ assigned-clock-rates = <400000000>, <133333333>;
+ };
+
+ lvds_csr: syscon@4b0c0000 {
+ compatible = "nxp,imx94-lvds-csr", "syscon";
+ reg = <0x0 0x4b0c0000 0x0 0x10000>;
+ clocks = <&scmi_clk IMX94_CLK_DISPAPB>;
+ #clock-cells = <1>;
+ power-domains = <&scmi_devpd IMX94_PD_DISPLAY>;
+ };
+ };
};
--
2.37.1
On 01/07/2025 09:04, Peng Fan wrote: > Add nodes for LVDS/DISPLAY CSR. > > Add ldb_pll_div7 node which is used for clock source of DISPLAY CSR. > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > --- > arch/arm64/boot/dts/freescale/imx943.dtsi | 34 +++++++++++++++++++++++++++++++ > 1 file changed, 34 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx943.dtsi b/arch/arm64/boot/dts/freescale/imx943.dtsi > index 45b8da758e87771c0775eb799ce2da3aac37c060..cf67dba21e4f6f27fff7e5d29744086e4ec9c021 100644 > --- a/arch/arm64/boot/dts/freescale/imx943.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx943.dtsi > @@ -3,6 +3,8 @@ > * Copyright 2025 NXP > */ > > +#include <dt-bindings/clock/nxp,imx94-clock.h> > + > #include "imx94.dtsi" > > / { > @@ -145,4 +147,36 @@ l3_cache: l3-cache { > cache-unified; > }; > }; > + > + ldb_pll_pixel: ldb_pll_div7 { Not a DTS coding style. Please use name for all fixed clocks which matches current format recommendation: 'clock-<freq>' (see also the pattern in the binding for any other options). https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/clock/fixed-clock.yaml?h=v6.11-rc1 > + compatible = "fixed-factor-clock"; > + #clock-cells = <0>; > + clocks = <&scmi_clk IMX94_CLK_LDBPLL>; > + clock-div = <7>; > + clock-mult = <1>; > + clock-output-names = "ldb_pll_div7"; > + }; Best regards, Krzysztof
On Tue, Jul 01, 2025 at 01:38:11PM +0200, Krzysztof Kozlowski wrote: >On 01/07/2025 09:04, Peng Fan wrote: >> Add nodes for LVDS/DISPLAY CSR. >> >> Add ldb_pll_div7 node which is used for clock source of DISPLAY CSR. >> >> Signed-off-by: Peng Fan <peng.fan@nxp.com> >> --- >> arch/arm64/boot/dts/freescale/imx943.dtsi | 34 +++++++++++++++++++++++++++++++ >> 1 file changed, 34 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/freescale/imx943.dtsi b/arch/arm64/boot/dts/freescale/imx943.dtsi >> index 45b8da758e87771c0775eb799ce2da3aac37c060..cf67dba21e4f6f27fff7e5d29744086e4ec9c021 100644 >> --- a/arch/arm64/boot/dts/freescale/imx943.dtsi >> +++ b/arch/arm64/boot/dts/freescale/imx943.dtsi >> @@ -3,6 +3,8 @@ >> * Copyright 2025 NXP >> */ >> >> +#include <dt-bindings/clock/nxp,imx94-clock.h> >> + >> #include "imx94.dtsi" >> >> / { >> @@ -145,4 +147,36 @@ l3_cache: l3-cache { >> cache-unified; >> }; >> }; >> + >> + ldb_pll_pixel: ldb_pll_div7 { > >Not a DTS coding style. > >Please use name for all fixed clocks which matches current format >recommendation: 'clock-<freq>' (see also the pattern in the binding for >any other options). oops, I should use '-'. And the rate is not fixed, so not able to use clock-<freq> for node name. grep "fixed-factor-clock" ./Documentation/devicetree/bindings/ -rn, I checked renesas,emev2-smu.yaml, fixed-factor-clock.yaml, I could use "ldb-pll-div7-clk" in V2. Thanks, Peng > >https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/clock/fixed-clock.yaml?h=v6.11-rc1 > >> + compatible = "fixed-factor-clock"; >> + #clock-cells = <0>; >> + clocks = <&scmi_clk IMX94_CLK_LDBPLL>; >> + clock-div = <7>; >> + clock-mult = <1>; >> + clock-output-names = "ldb_pll_div7"; >> + }; > > > >Best regards, >Krzysztof
Hi, Am Dienstag, 1. Juli 2025, 09:04:41 CEST schrieb Peng Fan: > Add nodes for LVDS/DISPLAY CSR. > > Add ldb_pll_div7 node which is used for clock source of DISPLAY CSR. > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > --- > arch/arm64/boot/dts/freescale/imx943.dtsi | 34 +++++++++++++++++++++++++++++++ > 1 file changed, 34 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx943.dtsi b/arch/arm64/boot/dts/freescale/imx943.dtsi > index 45b8da758e87771c0775eb799ce2da3aac37c060..cf67dba21e4f6f27fff7e5d29744086e4ec9c021 100644 > --- a/arch/arm64/boot/dts/freescale/imx943.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx943.dtsi Why is this specific to imx943 but not imx94? What is the difference anyway? Best regards Alexander > @@ -3,6 +3,8 @@ > * Copyright 2025 NXP > */ > > +#include <dt-bindings/clock/nxp,imx94-clock.h> > + > #include "imx94.dtsi" > > / { > @@ -145,4 +147,36 @@ l3_cache: l3-cache { > cache-unified; > }; > }; > + > + ldb_pll_pixel: ldb_pll_div7 { > + compatible = "fixed-factor-clock"; > + #clock-cells = <0>; > + clocks = <&scmi_clk IMX94_CLK_LDBPLL>; > + clock-div = <7>; > + clock-mult = <1>; > + clock-output-names = "ldb_pll_div7"; > + }; > + > + soc { > + dispmix_csr: syscon@4b010000 { > + compatible = "nxp,imx94-display-csr", "syscon"; > + reg = <0x0 0x4b010000 0x0 0x10000>; > + clocks = <&scmi_clk IMX94_CLK_DISPAPB>; > + #clock-cells = <1>; > + power-domains = <&scmi_devpd IMX94_PD_DISPLAY>; > + assigned-clocks = <&scmi_clk IMX94_CLK_DISPAXI>, > + <&scmi_clk IMX94_CLK_DISPAPB>; > + assigned-clock-parents = <&scmi_clk IMX94_CLK_SYSPLL1_PFD1>, > + <&scmi_clk IMX94_CLK_SYSPLL1_PFD1_DIV2>; > + assigned-clock-rates = <400000000>, <133333333>; > + }; > + > + lvds_csr: syscon@4b0c0000 { > + compatible = "nxp,imx94-lvds-csr", "syscon"; > + reg = <0x0 0x4b0c0000 0x0 0x10000>; > + clocks = <&scmi_clk IMX94_CLK_DISPAPB>; > + #clock-cells = <1>; > + power-domains = <&scmi_devpd IMX94_PD_DISPLAY>; > + }; > + }; > }; > > -- TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht München, HRB 105018 Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider http://www.tq-group.com/
On Tue, Jul 01, 2025 at 11:28:07AM +0200, Alexander Stein wrote: >Hi, > >Am Dienstag, 1. Juli 2025, 09:04:41 CEST schrieb Peng Fan: >> Add nodes for LVDS/DISPLAY CSR. >> >> Add ldb_pll_div7 node which is used for clock source of DISPLAY CSR. >> >> Signed-off-by: Peng Fan <peng.fan@nxp.com> >> --- >> arch/arm64/boot/dts/freescale/imx943.dtsi | 34 +++++++++++++++++++++++++++++++ >> 1 file changed, 34 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/freescale/imx943.dtsi b/arch/arm64/boot/dts/freescale/imx943.dtsi >> index 45b8da758e87771c0775eb799ce2da3aac37c060..cf67dba21e4f6f27fff7e5d29744086e4ec9c021 100644 >> --- a/arch/arm64/boot/dts/freescale/imx943.dtsi >> +++ b/arch/arm64/boot/dts/freescale/imx943.dtsi > >Why is this specific to imx943 but not imx94? What is the difference anyway? There is only i.MX943 in i.MX94 family as of now. Other future variants may not support lvds or display. So Add the nodes in imx943.dtsi. In future if the family has more and more members, and they lvds and display supported, we could move back to imx94.dtsi. No specific reason. Thanks Peng > >Best regards >Alexander > >> @@ -3,6 +3,8 @@ >> * Copyright 2025 NXP >> */ >> >> +#include <dt-bindings/clock/nxp,imx94-clock.h> >> + >> #include "imx94.dtsi" >> >> / { >> @@ -145,4 +147,36 @@ l3_cache: l3-cache { >> cache-unified; >> }; >> }; >> + >> + ldb_pll_pixel: ldb_pll_div7 { >> + compatible = "fixed-factor-clock"; >> + #clock-cells = <0>; >> + clocks = <&scmi_clk IMX94_CLK_LDBPLL>; >> + clock-div = <7>; >> + clock-mult = <1>; >> + clock-output-names = "ldb_pll_div7"; >> + }; >> + >> + soc { >> + dispmix_csr: syscon@4b010000 { >> + compatible = "nxp,imx94-display-csr", "syscon"; >> + reg = <0x0 0x4b010000 0x0 0x10000>; >> + clocks = <&scmi_clk IMX94_CLK_DISPAPB>; >> + #clock-cells = <1>; >> + power-domains = <&scmi_devpd IMX94_PD_DISPLAY>; >> + assigned-clocks = <&scmi_clk IMX94_CLK_DISPAXI>, >> + <&scmi_clk IMX94_CLK_DISPAPB>; >> + assigned-clock-parents = <&scmi_clk IMX94_CLK_SYSPLL1_PFD1>, >> + <&scmi_clk IMX94_CLK_SYSPLL1_PFD1_DIV2>; >> + assigned-clock-rates = <400000000>, <133333333>; >> + }; >> + >> + lvds_csr: syscon@4b0c0000 { >> + compatible = "nxp,imx94-lvds-csr", "syscon"; >> + reg = <0x0 0x4b0c0000 0x0 0x10000>; >> + clocks = <&scmi_clk IMX94_CLK_DISPAPB>; >> + #clock-cells = <1>; >> + power-domains = <&scmi_devpd IMX94_PD_DISPLAY>; >> + }; >> + }; >> }; >> >> > > >-- >TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany >Amtsgericht München, HRB 105018 >Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider >http://www.tq-group.com/ > >
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