Add devicetree nodes for MIPI PHYs, Samsung's DECON and DSIM blocks, and
DECON IOMMU devicetree nodes. Enables SoC support for hardware to be
able to drive a MIPI DSI display.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
arch/arm64/boot/dts/exynos/exynos7870.dtsi | 90 ++++++++++++++++++++++++++++++
1 file changed, 90 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos7870.dtsi b/arch/arm64/boot/dts/exynos/exynos7870.dtsi
index 5cba8c9bb403405b2d9721ab8cf9d61e3d5faf95..5f143216c758d9994bd508dc60fbe30f4cd9ee5f 100644
--- a/arch/arm64/boot/dts/exynos/exynos7870.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7870.dtsi
@@ -178,6 +178,14 @@ pmu_system_controller: system-controller@10480000 {
"samsung,exynos7-pmu", "syscon";
reg = <0x10480000 0x10000>;
+ mipi_phy: mipi-phy {
+ compatible = "samsung,exynos7870-mipi-video-phy";
+ #phy-cells = <1>;
+
+ samsung,cam0-sysreg = <&syscon_cam0>;
+ samsung,disp-sysreg = <&syscon_disp>;
+ };
+
reboot-mode {
compatible = "syscon-reboot-mode";
offset = <0x080c>;
@@ -674,6 +682,83 @@ cmu_isp: clock-controller@144d0000 {
<&cmu_mif CLK_GOUT_MIF_CMU_ISP_VRA>;
};
+ syscon_cam0: syscon@144f1040 {
+ compatible = "samsung,exynos7870-cam0-sysreg", "syscon";
+ reg = <0x144f1040 0x04>;
+ };
+
+ dsi: dsi@14800000 {
+ compatible = "samsung,exynos7870-mipi-dsi";
+ reg = <0x14800000 0x100>;
+ interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
+
+ clock-names = "bus", "pll", "byte", "esc";
+ clocks = <&cmu_dispaud CLK_GOUT_DISPAUD_BUS_DISP>,
+ <&cmu_dispaud CLK_GOUT_DISPAUD_APB_DISP>,
+ <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_MIPIPHY_TXBYTECLKHS_USER>,
+ <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_MIPIPHY_RXCLKESC0_USER>;
+
+ phy-names = "dsim";
+ phys = <&mipi_phy 1>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ dsi_to_decon: endpoint {
+ remote-endpoint = <&decon_to_dsi>;
+ };
+ };
+ };
+ };
+
+ decon: decon@14830000 {
+ compatible = "samsung,exynos7870-decon";
+ reg = <0x14830000 0x8000>;
+ interrupt-names = "fifo", "vsync", "lcd_sys";
+ interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
+
+ clock-names = "pclk_decon0", "aclk_decon0",
+ "decon0_eclk", "decon0_vclk";
+ clocks = <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_PLL>,
+ <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_BUS_USER>,
+ <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_DECON_ECLK>,
+ <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_DECON_VCLK>;
+
+ iommus = <&sysmmu_decon>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ decon_to_dsi: endpoint {
+ remote-endpoint = <&dsi_to_decon>;
+ };
+ };
+ };
+ };
+
+ sysmmu_decon: sysmmu@14860000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x14860000 0x1000>;
+ interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <0>;
+
+ clock-names = "sysmmu";
+ clocks = <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_BUS_USER>;
+ };
+
pinctrl_dispaud: pinctrl@148c0000 {
compatible = "samsung,exynos7870-pinctrl";
reg = <0x148c0000 0x1000>;
@@ -691,6 +776,11 @@ cmu_dispaud: clock-controller@148d0000 {
<&cmu_mif CLK_GOUT_MIF_CMU_DISPAUD_DECON_ECLK>,
<&cmu_mif CLK_GOUT_MIF_CMU_DISPAUD_DECON_VCLK>;
};
+
+ syscon_disp: syscon@148f100c {
+ compatible = "samsung,exynos7870-disp-sysreg", "syscon";
+ reg = <0x148f100c 0x04>;
+ };
};
timer {
--
2.49.0
On 26/06/2025 22:13, Kaustabh Chakraborty wrote: > reboot-mode { > compatible = "syscon-reboot-mode"; > offset = <0x080c>; > @@ -674,6 +682,83 @@ cmu_isp: clock-controller@144d0000 { > <&cmu_mif CLK_GOUT_MIF_CMU_ISP_VRA>; > }; > > + syscon_cam0: syscon@144f1040 { > + compatible = "samsung,exynos7870-cam0-sysreg", "syscon"; > + reg = <0x144f1040 0x04>; > + }; > + > + dsi: dsi@14800000 { > + compatible = "samsung,exynos7870-mipi-dsi"; > + reg = <0x14800000 0x100>; > + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; > + > + clock-names = "bus", "pll", "byte", "esc"; > + clocks = <&cmu_dispaud CLK_GOUT_DISPAUD_BUS_DISP>, > + <&cmu_dispaud CLK_GOUT_DISPAUD_APB_DISP>, > + <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_MIPIPHY_TXBYTECLKHS_USER>, > + <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_MIPIPHY_RXCLKESC0_USER>; First clocks, then clock-names, please. Same for phys here and in all other place. > + > + phy-names = "dsim"; > + phys = <&mipi_phy 1>; > + > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + dsi_to_decon: endpoint { > + remote-endpoint = <&decon_to_dsi>; > + }; > + }; > + }; > + }; > + > + decon: decon@14830000 { node name: display-controller@ > + compatible = "samsung,exynos7870-decon"; > + reg = <0x14830000 0x8000>; > + interrupt-names = "fifo", "vsync", "lcd_sys"; > + interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>; > + > + clock-names = "pclk_decon0", "aclk_decon0", > + "decon0_eclk", "decon0_vclk"; > + clocks = <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_PLL>, > + <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_BUS_USER>, > + <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_DECON_ECLK>, > + <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_DECON_VCLK>; > + > + iommus = <&sysmmu_decon>; > + > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + decon_to_dsi: endpoint { > + remote-endpoint = <&dsi_to_decon>; > + }; > + }; > + }; > + }; > + > + sysmmu_decon: sysmmu@14860000 { iommu@ > + compatible = "samsung,exynos-sysmmu"; > + reg = <0x14860000 0x1000>; > + interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; > + #iommu-cells = <0>; > + > + clock-names = "sysmmu"; > + clocks = <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_BUS_USER>; > + }; Best regards, Krzysztof
On 2025-08-13 07:56, Krzysztof Kozlowski wrote: > On 26/06/2025 22:13, Kaustabh Chakraborty wrote: >> reboot-mode { >> compatible = "syscon-reboot-mode"; >> offset = <0x080c>; >> @@ -674,6 +682,83 @@ cmu_isp: clock-controller@144d0000 { >> <&cmu_mif CLK_GOUT_MIF_CMU_ISP_VRA>; >> }; >> >> + syscon_cam0: syscon@144f1040 { >> + compatible = "samsung,exynos7870-cam0-sysreg", "syscon"; >> + reg = <0x144f1040 0x04>; >> + }; >> + >> + dsi: dsi@14800000 { >> + compatible = "samsung,exynos7870-mipi-dsi"; >> + reg = <0x14800000 0x100>; >> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; >> + >> + clock-names = "bus", "pll", "byte", "esc"; >> + clocks = <&cmu_dispaud CLK_GOUT_DISPAUD_BUS_DISP>, >> + <&cmu_dispaud CLK_GOUT_DISPAUD_APB_DISP>, >> + <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_MIPIPHY_TXBYTECLKHS_USER>, >> + <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_MIPIPHY_RXCLKESC0_USER>; > > First clocks, then clock-names, please. Same for phys here and in all > other place. x-names followed by x approach is followed by the entire dts. I will apply your suggestion in the next rev, and will also send a separate patch for the same in all other places. > >> + >> + phy-names = "dsim"; >> + phys = <&mipi_phy 1>; >> + >> + status = "disabled"; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + >> + dsi_to_decon: endpoint { >> + remote-endpoint = <&decon_to_dsi>; >> + }; >> + }; >> + }; >> + }; >> + >> + decon: decon@14830000 { > > node name: display-controller@ This was preemptively changed, thanks. > >> + compatible = "samsung,exynos7870-decon"; >> + reg = <0x14830000 0x8000>; >> + interrupt-names = "fifo", "vsync", "lcd_sys"; >> + interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, >> + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, >> + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>; >> + >> + clock-names = "pclk_decon0", "aclk_decon0", >> + "decon0_eclk", "decon0_vclk"; >> + clocks = <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_PLL>, >> + <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_BUS_USER>, >> + <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_DECON_ECLK>, >> + <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_DECON_VCLK>; >> + >> + iommus = <&sysmmu_decon>; >> + >> + status = "disabled"; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + decon_to_dsi: endpoint { >> + remote-endpoint = <&dsi_to_decon>; >> + }; >> + }; >> + }; >> + }; >> + >> + sysmmu_decon: sysmmu@14860000 { > > iommu@ Also preemptively changed. > >> + compatible = "samsung,exynos-sysmmu"; >> + reg = <0x14860000 0x1000>; >> + interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; >> + #iommu-cells = <0>; >> + >> + clock-names = "sysmmu"; >> + clocks = <&cmu_dispaud CLK_GOUT_DISPAUD_MUX_BUS_USER>; >> + }; > > > > Best regards, > Krzysztof
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