On i.MX, the PCIe reference clock might come from either internal
system PLL or external clock source.
Add the external reference clock source for reference clock.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index ca5f2970f217..a45876aba4da 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -219,7 +219,12 @@ allOf:
- const: pcie_bus
- const: pcie_phy
- const: pcie_aux
- - const: ref
+ - description: PCIe reference clock.
+ oneOf:
+ - description: The controller might be configured clocking
+ coming in from either an internal system PLL or an
+ external clock source.
+ enum: [ref, extref]
unevaluatedProperties: false
--
2.37.1
On Thu, Jun 26, 2025 at 03:38:03PM +0800, Richard Zhu wrote: > On i.MX, the PCIe reference clock might come from either internal > system PLL or external clock source. > Add the external reference clock source for reference clock. > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > Reviewed-by: Frank Li <Frank.Li@nxp.com> > --- > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > index ca5f2970f217..a45876aba4da 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > @@ -219,7 +219,12 @@ allOf: > - const: pcie_bus > - const: pcie_phy > - const: pcie_aux > - - const: ref > + - description: PCIe reference clock. > + oneOf: > + - description: The controller might be configured clocking > + coming in from either an internal system PLL or an > + external clock source. > + enum: [ref, extref] NAK As explained in other thread this is the same input and you just call it differently. Best regards, Krzysztof
On Thu, Jun 26, 2025 at 03:38:03PM +0800, Richard Zhu wrote: > On i.MX, the PCIe reference clock might come from either internal > system PLL or external clock source. > Add the external reference clock source for reference clock. Add blank line between paragraphs or reflow into a single paragraph.
On Thu, Jun 26, 2025 at 03:38:03PM +0800, Richard Zhu wrote: > On i.MX, the PCIe reference clock might come from either internal > system PLL or external clock source. On i.MX, PCIe has two reference clock inputs: one from the internal PLL and one from an external clock source. Only one needs to be used, depending on the board design. > Add the external reference clock source for reference clock. for external reference clock. subject missed s, should be dt-bindings. > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > Reviewed-by: Frank Li <Frank.Li@nxp.com> > --- > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > index ca5f2970f217..a45876aba4da 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > @@ -219,7 +219,12 @@ allOf: > - const: pcie_bus > - const: pcie_phy > - const: pcie_aux > - - const: ref > + - description: PCIe reference clock. > + oneOf: > + - description: The controller might be configured clocking > + coming in from either an internal system PLL or an > + external clock source. description: The controller have two reference clock inputs: internal system PLL and external clock cource. Only one need be used. > + enum: [ref, extref] > > unevaluatedProperties: false > > -- > 2.37.1 >
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