Introduce as per jdec,lpddrX-channel binding, jdec,ddr[3-4]-channel
binding.

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
---
 .../memory-controllers/ddr/jedec,ddr-channel.yaml  | 53 ++++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr-channel.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr-channel.yaml
new file mode 100644
index 000000000000..5271b41279e2
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr-channel.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,ddr-channel.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: DDR channel with chip/rank topology description
+
+description:
+  A DDR channel is a logical grouping of memory chips that are connected
+  to a host system. The main purpose of this node is to describe the
+  overall DDR topology of the system, including the amount of individual
+  DDR chips.
+
+maintainers:
+  - Clément Le Goffic <clement.legoffic@foss.st.com>
+
+properties:
+  compatible:
+    enum:
+      - jedec,ddr3-channel
+      - jedec,ddr4-channel
+
+  io-width:
+    description:
+      The number of DQ pins in the channel. If this number is different
+      from (a multiple of) the io-width of the DDR chip, that means that
+      multiple instances of that type of chip are wired in parallel on this
+      channel (with the channel's DQ pins split up between the different
+      chips, and the CA, CS, etc. pins of the different chips all shorted
+      together).  This means that the total physical memory controlled by a
+      channel is equal to the sum of the densities of each rank on the
+      connected DDR chip, times the io-width of the channel divided by
+      the io-width of the DDR chip.
+    enum:
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+
+required:
+      - compatible
+      - io-width
+
+additionalProperties: false
+
+examples:
+  - |
+    ddr_channel: ddr3-channel@0 {
+        compatible = "jedec,ddr3-channel";
+        io-width = <16>;
+    };

-- 
2.43.0

On 26/06/2025 21:48, Clément Le Goffic wrote:
> Introduce as per jdec,lpddrX-channel binding, jdec,ddr[3-4]-channel

s/jdec/jedec/

> binding.
> 
> Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
> ---


> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    ddr_channel: ddr3-channel@0 {
> +        compatible = "jedec,ddr3-channel";
> +        io-width = <16>;

Missing reg... or not? What was your intention


> +    };
> 


Best regards,
Krzysztof

Hi Krzysztof,

On 7/9/25 20:27, Krzysztof Kozlowski wrote:
> On 26/06/2025 21:48, Clément Le Goffic wrote:
>> Introduce as per jdec,lpddrX-channel binding, jdec,ddr[3-4]-channel
> 
> s/jdec/jedec/

Right thanks

> 
>> binding.
>>
>> Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
>> ---
> 
> 
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    ddr_channel: ddr3-channel@0 {
>> +        compatible = "jedec,ddr3-channel";
>> +        io-width = <16>;
> 
> Missing reg... or not? What was your intention

Indeed no reg.
I'll drop the "@0" for the next version.

> 
> 
>> +    };
>>
> 
> 
> Best regards,
> Krzysztof