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[PATCH 4/6] arm64: dts: renesas: r9a09g087: Add SDHI nodes

Prabhakar posted 6 patches 7 months, 2 weeks ago
There is a newer version of this series
[PATCH 4/6] arm64: dts: renesas: r9a09g087: Add SDHI nodes
Posted by Prabhakar 7 months, 2 weeks ago 
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add SDHI0-SDHI1 nodes to RZ/N2H ("R9A09G087") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a09g087.dtsi | 40 ++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
index 63c9681116bf..532dcc0d8dd6 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
@@ -155,6 +155,46 @@ gic: interrupt-controller@83000000 {
 			interrupt-controller;
 			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
 		};
+
+		sdhi0: mmc@92080000  {
+			compatible = "renesas,sdhi-r9a09g087",
+				     "renesas,sdhi-r9a09g057";
+			reg = <0x0 0x92080000 0 0x10000>;
+			interrupts = <GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 1212>,
+				 <&cpg CPG_CORE R9A09G087_SDHI_CLKHS>;
+			clock-names = "aclk", "clkh";
+			power-domains = <&cpg>;
+			status = "disabled";
+
+			sdhi0_vqmmc: vqmmc-regulator {
+				regulator-name = "SDHI0-VQMMC";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				status = "disabled";
+			};
+		};
+
+		sdhi1: mmc@92090000 {
+			compatible = "renesas,sdhi-r9a09g087",
+				     "renesas,sdhi-r9a09g057";
+			reg = <0x0 0x92090000 0 0x10000>;
+			interrupts = <GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 1213>,
+				 <&cpg CPG_CORE R9A09G087_SDHI_CLKHS>;
+			clock-names = "aclk", "clkh";
+			power-domains = <&cpg>;
+			status = "disabled";
+
+			sdhi1_vqmmc: vqmmc-regulator {
+				regulator-name = "SDHI1-VQMMC";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				status = "disabled";
+			};
+		};
 	};
 
 	timer {
-- 
2.49.0
Re: [PATCH 4/6] arm64: dts: renesas: r9a09g087: Add SDHI nodes
Posted by Geert Uytterhoeven 7 months, 1 week ago 
Hi Prabhakar,

On Wed, 25 Jun 2025 at 17:31, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add SDHI0-SDHI1 nodes to RZ/N2H ("R9A09G087") SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
> @@ -155,6 +155,46 @@ gic: interrupt-controller@83000000 {
>                         interrupt-controller;
>                         interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
>                 };
> +
> +               sdhi0: mmc@92080000  {
> +                       compatible = "renesas,sdhi-r9a09g087",
> +                                    "renesas,sdhi-r9a09g057";
> +                       reg = <0x0 0x92080000 0 0x10000>;
> +                       interrupts = <GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&cpg CPG_MOD 1212>,

1112?

> +                                <&cpg CPG_CORE R9A09G087_SDHI_CLKHS>;
> +                       clock-names = "aclk", "clkh";
> +                       power-domains = <&cpg>;
> +                       status = "disabled";
> +
> +                       sdhi0_vqmmc: vqmmc-regulator {
> +                               regulator-name = "SDHI0-VQMMC";
> +                               regulator-min-microvolt = <1800000>;
> +                               regulator-max-microvolt = <3300000>;
> +                               status = "disabled";
> +                       };
> +               };
> +
> +               sdhi1: mmc@92090000 {
> +                       compatible = "renesas,sdhi-r9a09g087",
> +                                    "renesas,sdhi-r9a09g057";
> +                       reg = <0x0 0x92090000 0 0x10000>;
> +                       interrupts = <GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&cpg CPG_MOD 1213>,

1113?

> +                                <&cpg CPG_CORE R9A09G087_SDHI_CLKHS>;
> +                       clock-names = "aclk", "clkh";
> +                       power-domains = <&cpg>;
> +                       status = "disabled";
> +
> +                       sdhi1_vqmmc: vqmmc-regulator {
> +                               regulator-name = "SDHI1-VQMMC";
> +                               regulator-min-microvolt = <1800000>;
> +                               regulator-max-microvolt = <3300000>;
> +                               status = "disabled";
> +                       };
> +               };
>         };
>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Re: [PATCH 4/6] arm64: dts: renesas: r9a09g087: Add SDHI nodes
Posted by Geert Uytterhoeven 7 months, 1 week ago 
On Thu, 3 Jul 2025 at 11:56, Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Wed, 25 Jun 2025 at 17:31, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Add SDHI0-SDHI1 nodes to RZ/N2H ("R9A09G087") SoC DTSI.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
> > @@ -155,6 +155,46 @@ gic: interrupt-controller@83000000 {
> >                         interrupt-controller;
> >                         interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
> >                 };
> > +
> > +               sdhi0: mmc@92080000  {
> > +                       compatible = "renesas,sdhi-r9a09g087",
> > +                                    "renesas,sdhi-r9a09g057";
> > +                       reg = <0x0 0x92080000 0 0x10000>;
> > +                       interrupts = <GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH>,
> > +                                    <GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH>;
> > +                       clocks = <&cpg CPG_MOD 1212>,
>
> 1112?
>
> > +                                <&cpg CPG_CORE R9A09G087_SDHI_CLKHS>;
> > +                       clock-names = "aclk", "clkh";
> > +                       power-domains = <&cpg>;
> > +                       status = "disabled";
> > +
> > +                       sdhi0_vqmmc: vqmmc-regulator {
> > +                               regulator-name = "SDHI0-VQMMC";
> > +                               regulator-min-microvolt = <1800000>;
> > +                               regulator-max-microvolt = <3300000>;
> > +                               status = "disabled";
> > +                       };
> > +               };
> > +
> > +               sdhi1: mmc@92090000 {
> > +                       compatible = "renesas,sdhi-r9a09g087",
> > +                                    "renesas,sdhi-r9a09g057";
> > +                       reg = <0x0 0x92090000 0 0x10000>;
> > +                       interrupts = <GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH>,
> > +                                    <GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH>;
> > +                       clocks = <&cpg CPG_MOD 1213>,
>
> 1113?
>
> > +                                <&cpg CPG_CORE R9A09G087_SDHI_CLKHS>;
> > +                       clock-names = "aclk", "clkh";
> > +                       power-domains = <&cpg>;
> > +                       status = "disabled";
> > +
> > +                       sdhi1_vqmmc: vqmmc-regulator {
> > +                               regulator-name = "SDHI1-VQMMC";
> > +                               regulator-min-microvolt = <1800000>;
> > +                               regulator-max-microvolt = <3300000>;
> > +                               status = "disabled";
> > +                       };
> > +               };
> >         };
> >

Same here: it is indeed 1212/1213 as the bits belong to MSTPCRM register.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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