From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

The Renesas RZ/N2H ("R9A09G087") SoC includes three I2C (RIIC) channels.
Adds the device tree nodes for all three I2C controllers to RZ/N2H
SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a09g087.dtsi | 45 ++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
index e57a91adcb68..63c9681116bf 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
@@ -90,6 +90,51 @@ sci0: serial@80005000 {
 			status = "disabled";
 		};
 
+		i2c0: i2c@80088000 {
+			compatible = "renesas,riic-r9a09g087", "renesas,riic-r9a09g077";
+			reg = <0 0x80088000 0 0x400>;
+			interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 615 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 616 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 617 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "eei", "rxi", "txi", "tei";
+			clocks = <&cpg CPG_MOD 100>;
+			power-domains = <&cpg>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@80088004 {
+			compatible = "renesas,riic-r9a09g087", "renesas,riic-r9a09g077";
+			reg = <0 0x80088400 0 0x400>;
+			interrupts = <GIC_SPI 618 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 619 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 620 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 621 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "eei", "rxi", "txi", "tei";
+			clocks = <&cpg CPG_MOD 101>;
+			power-domains = <&cpg>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c2: i2c@81008000 {
+			compatible = "renesas,riic-r9a09g087", "renesas,riic-r9a09g077";
+			reg = <0 0x81008000 0 0x400>;
+			interrupts = <GIC_SPI 622 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 623 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 624 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "eei", "rxi", "txi", "tei";
+			clocks = <&cpg CPG_MOD 501>;
+			power-domains = <&cpg>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		cpg: clock-controller@80280000 {
 			compatible = "renesas,r9a09g087-cpg-mssr";
 			reg = <0 0x80280000 0 0x1000>,
-- 
2.49.0

Hi Prabhakar,

On Wed, 25 Jun 2025 at 17:31, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> The Renesas RZ/N2H ("R9A09G087") SoC includes three I2C (RIIC) channels.
> Adds the device tree nodes for all three I2C controllers to RZ/N2H
> SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
> @@ -90,6 +90,51 @@ sci0: serial@80005000 {
>                         status = "disabled";
>                 };
>
> +               i2c0: i2c@80088000 {
> +                       compatible = "renesas,riic-r9a09g087", "renesas,riic-r9a09g077";
> +                       reg = <0 0x80088000 0 0x400>;
> +                       interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 615 IRQ_TYPE_EDGE_RISING>,
> +                                    <GIC_SPI 616 IRQ_TYPE_EDGE_RISING>,
> +                                    <GIC_SPI 617 IRQ_TYPE_LEVEL_HIGH>;
> +                       interrupt-names = "eei", "rxi", "txi", "tei";
> +                       clocks = <&cpg CPG_MOD 100>;
> +                       power-domains = <&cpg>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "disabled";
> +               };
> +
> +               i2c1: i2c@80088004 {

80088400

> +                       compatible = "renesas,riic-r9a09g087", "renesas,riic-r9a09g077";
> +                       reg = <0 0x80088400 0 0x400>;
> +                       interrupts = <GIC_SPI 618 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 619 IRQ_TYPE_EDGE_RISING>,
> +                                    <GIC_SPI 620 IRQ_TYPE_EDGE_RISING>,
> +                                    <GIC_SPI 621 IRQ_TYPE_LEVEL_HIGH>;
> +                       interrupt-names = "eei", "rxi", "txi", "tei";
> +                       clocks = <&cpg CPG_MOD 101>;
> +                       power-domains = <&cpg>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "disabled";
> +               };
> +
> +               i2c2: i2c@81008000 {
> +                       compatible = "renesas,riic-r9a09g087", "renesas,riic-r9a09g077";
> +                       reg = <0 0x81008000 0 0x400>;
> +                       interrupts = <GIC_SPI 622 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 623 IRQ_TYPE_EDGE_RISING>,
> +                                    <GIC_SPI 624 IRQ_TYPE_EDGE_RISING>,
> +                                    <GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH>;
> +                       interrupt-names = "eei", "rxi", "txi", "tei";
> +                       clocks = <&cpg CPG_MOD 501>;

601

> +                       power-domains = <&cpg>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "disabled";
> +               };
> +
>                 cpg: clock-controller@80280000 {
>                         compatible = "renesas,r9a09g087-cpg-mssr";
>                         reg = <0 0x80280000 0 0x1000>,

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds