Fix several minor typo errors in comments:
- Remove duplicated word "a" in "a a VID / GroupID".
- Correct "Opcopdes" to "Opcodes" in CXL spec reference.
- Fix spelling of "implemnted" to "implemented".
Improves code readability and documentation consistency.
Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>
---
drivers/perf/cxl_pmu.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/perf/cxl_pmu.c b/drivers/perf/cxl_pmu.c
index 5a475a5a1f095..d094030220bf2 100644
--- a/drivers/perf/cxl_pmu.c
+++ b/drivers/perf/cxl_pmu.c
@@ -113,7 +113,7 @@ struct cxl_pmu_info {
/*
* All CPMU counters are discoverable via the Event Capabilities Registers.
- * Each Event Capability register contains a a VID / GroupID.
+ * Each Event Capability register contains a VID / GroupID.
* A counter may then count any combination (by summing) of events in
* that group which are in the Supported Events Bitmask.
* However, there are some complexities to the scheme.
@@ -406,7 +406,7 @@ static struct attribute *cxl_pmu_event_attrs[] = {
CXL_PMU_EVENT_CXL_ATTR(s2m_bisnp_curblk, CXL_PMU_GID_S2M_BISNP, BIT(4)),
CXL_PMU_EVENT_CXL_ATTR(s2m_bisnp_datblk, CXL_PMU_GID_S2M_BISNP, BIT(5)),
CXL_PMU_EVENT_CXL_ATTR(s2m_bisnp_invblk, CXL_PMU_GID_S2M_BISNP, BIT(6)),
- /* CXL rev 3.1 Table 3-50 S2M NDR Opcopdes */
+ /* CXL rev 3.1 Table 3-50 S2M NDR Opcodes */
CXL_PMU_EVENT_CXL_ATTR(s2m_ndr_cmp, CXL_PMU_GID_S2M_NDR, BIT(0)),
CXL_PMU_EVENT_CXL_ATTR(s2m_ndr_cmps, CXL_PMU_GID_S2M_NDR, BIT(1)),
CXL_PMU_EVENT_CXL_ATTR(s2m_ndr_cmpe, CXL_PMU_GID_S2M_NDR, BIT(2)),
@@ -627,7 +627,7 @@ static void cxl_pmu_event_start(struct perf_event *event, int flags)
hwc->state = 0;
/*
- * Currently only hdm filter control is implemnted, this code will
+ * Currently only hdm filter control is implemented, this code will
* want generalizing when more filters are added.
*/
if (info->filter_hdm) {
--
2.46.0
On Tue, 24 Jun 2025 12:43:40 -0700 Alok Tiwari <alok.a.tiwari@oracle.com> wrote: > Fix several minor typo errors in comments: > - Remove duplicated word "a" in "a a VID / GroupID". > - Correct "Opcopdes" to "Opcodes" in CXL spec reference. > - Fix spelling of "implemnted" to "implemented". > > Improves code readability and documentation consistency. > > Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com> One day I'll remember to run a spell checker :( Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> > --- > drivers/perf/cxl_pmu.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/perf/cxl_pmu.c b/drivers/perf/cxl_pmu.c > index 5a475a5a1f095..d094030220bf2 100644 > --- a/drivers/perf/cxl_pmu.c > +++ b/drivers/perf/cxl_pmu.c > @@ -113,7 +113,7 @@ struct cxl_pmu_info { > > /* > * All CPMU counters are discoverable via the Event Capabilities Registers. > - * Each Event Capability register contains a a VID / GroupID. > + * Each Event Capability register contains a VID / GroupID. > * A counter may then count any combination (by summing) of events in > * that group which are in the Supported Events Bitmask. > * However, there are some complexities to the scheme. > @@ -406,7 +406,7 @@ static struct attribute *cxl_pmu_event_attrs[] = { > CXL_PMU_EVENT_CXL_ATTR(s2m_bisnp_curblk, CXL_PMU_GID_S2M_BISNP, BIT(4)), > CXL_PMU_EVENT_CXL_ATTR(s2m_bisnp_datblk, CXL_PMU_GID_S2M_BISNP, BIT(5)), > CXL_PMU_EVENT_CXL_ATTR(s2m_bisnp_invblk, CXL_PMU_GID_S2M_BISNP, BIT(6)), > - /* CXL rev 3.1 Table 3-50 S2M NDR Opcopdes */ > + /* CXL rev 3.1 Table 3-50 S2M NDR Opcodes */ > CXL_PMU_EVENT_CXL_ATTR(s2m_ndr_cmp, CXL_PMU_GID_S2M_NDR, BIT(0)), > CXL_PMU_EVENT_CXL_ATTR(s2m_ndr_cmps, CXL_PMU_GID_S2M_NDR, BIT(1)), > CXL_PMU_EVENT_CXL_ATTR(s2m_ndr_cmpe, CXL_PMU_GID_S2M_NDR, BIT(2)), > @@ -627,7 +627,7 @@ static void cxl_pmu_event_start(struct perf_event *event, int flags) > hwc->state = 0; > > /* > - * Currently only hdm filter control is implemnted, this code will > + * Currently only hdm filter control is implemented, this code will > * want generalizing when more filters are added. > */ > if (info->filter_hdm) {
© 2016 - 2025 Red Hat, Inc.