[PATCH v2 10/29] dt-bindings: reset: Add MediaTek MT8196 Reset Controller binding

Laura Nao posted 29 patches 3 months, 2 weeks ago
There is a newer version of this series
[PATCH v2 10/29] dt-bindings: reset: Add MediaTek MT8196 Reset Controller binding
Posted by Laura Nao 3 months, 2 weeks ago
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Add a binding for the PEXTP0/1 and UFS reset controllers found in
the MediaTek MT8196 Chromebook SoC.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Laura Nao <laura.nao@collabora.com>
---
 .../reset/mediatek,mt8196-resets.h            | 26 +++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 include/dt-bindings/reset/mediatek,mt8196-resets.h

diff --git a/include/dt-bindings/reset/mediatek,mt8196-resets.h b/include/dt-bindings/reset/mediatek,mt8196-resets.h
new file mode 100644
index 000000000000..46ced0850d91
--- /dev/null
+++ b/include/dt-bindings/reset/mediatek,mt8196-resets.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2025 Collabora Ltd.
+ * Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+ */
+
+#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8196
+#define _DT_BINDINGS_RESET_CONTROLLER_MT8196
+
+/* PEXTP0 resets */
+#define MT8196_PEXTP0_RST0_PCIE0_MAC		0
+#define MT8196_PEXTP0_RST0_PCIE0_PHY		1
+
+/* PEXTP1 resets */
+#define MT8196_PEXTP1_RST0_PCIE1_MAC		0
+#define MT8196_PEXTP1_RST0_PCIE1_PHY		1
+#define MT8196_PEXTP1_RST0_PCIE2_MAC		2
+#define MT8196_PEXTP1_RST0_PCIE2_PHY		3
+
+/* UFS resets */
+#define MT8196_UFSAO_RST0_UFS_MPHY		0
+#define MT8196_UFSAO_RST1_UFS_UNIPRO		1
+#define MT8196_UFSAO_RST1_UFS_CRYPTO		2
+#define MT8196_UFSAO_RST1_UFSHCI		3
+
+#endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8196 */
-- 
2.39.5
Re: [PATCH v2 10/29] dt-bindings: reset: Add MediaTek MT8196 Reset Controller binding
Posted by Krzysztof Kozlowski 3 months, 2 weeks ago
On 24/06/2025 16:32, Laura Nao wrote:
> From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> 
> Add a binding for the PEXTP0/1 and UFS reset controllers found in
> the MediaTek MT8196 Chromebook SoC.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Signed-off-by: Laura Nao <laura.nao@collabora.com>
> ---
>  .../reset/mediatek,mt8196-resets.h            | 26 +++++++++++++++++++
>  1 file changed, 26 insertions(+)
>  create mode 100644 include/dt-bindings/reset/mediatek,mt8196-resets.h

No improvements.

<form letter>
This is a friendly reminder during the review process.

It seems my or other reviewer's previous comments were not fully
addressed. Maybe the feedback got lost between the quotes, maybe you
just forgot to apply it. Please go back to the previous discussion and
either implement all requested changes or keep discussing them.

Thank you.
</form letter>

Best regards,
Krzysztof
Re: [PATCH v2 10/29] dt-bindings: reset: Add MediaTek MT8196 Reset Controller binding
Posted by Laura Nao 3 months, 2 weeks ago
Hi Krzysztof,

On 6/24/25 18:03, Krzysztof Kozlowski wrote:
> On 24/06/2025 16:32, Laura Nao wrote:
>> From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>>
>> Add a binding for the PEXTP0/1 and UFS reset controllers found in
>> the MediaTek MT8196 Chromebook SoC.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> Signed-off-by: Laura Nao <laura.nao@collabora.com>
>> ---
>>  .../reset/mediatek,mt8196-resets.h            | 26 +++++++++++++++++++
>>  1 file changed, 26 insertions(+)
>>  create mode 100644 include/dt-bindings/reset/mediatek,mt8196-resets.h
>
> No improvements.
>

Apologies - I misinterpreted your comment. I assumed you were referring 
to adding the commit message details to the binding doc (which is why I
added a description for reset-cells), but I realize now you likely meant 
the header file should be included in the same commit which adds the 
clock binding documentation. Is that correct?

I’ll fix that in the next revision.

Thanks,

Laura

Re: [PATCH v2 10/29] dt-bindings: reset: Add MediaTek MT8196 Reset Controller binding
Posted by Krzysztof Kozlowski 3 months, 2 weeks ago
On 24/06/2025 18:03, Krzysztof Kozlowski wrote:
> On 24/06/2025 16:32, Laura Nao wrote:
>> From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>>
>> Add a binding for the PEXTP0/1 and UFS reset controllers found in
>> the MediaTek MT8196 Chromebook SoC.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> Signed-off-by: Laura Nao <laura.nao@collabora.com>
>> ---
>>  .../reset/mediatek,mt8196-resets.h            | 26 +++++++++++++++++++
>>  1 file changed, 26 insertions(+)
>>  create mode 100644 include/dt-bindings/reset/mediatek,mt8196-resets.h
> 
> No improvements.

I see the license got fixed, so half improvements. My other comment stays.

Respond to the comments instead.

Best regards,
Krzysztof