The MCT register is unfortunately very slow to access, but importantly
does not halt in the c2 idle state. So for ARM64, we can improve
performance by not registering the MCT for sched_clock, allowing the
system to use the faster ARM architected timer for sched_clock instead.
The MCT is still registered as a clocksource, and a clockevent in order
to be a wakeup source for the arch_timer to exit the "c2" idle state.
Since ARM32 SoCs don't have an architected timer, the MCT must continue
to be used for sched_clock. Detailed discussion on this topic can be
found at [1].
[1] https://lore.kernel.org/linux-samsung-soc/1400188079-21832-1-git-send-email-chirantan@chromium.org/
[Original commit from https://android.googlesource.com/kernel/gs/+/630817f7080e92c5e0216095ff52f6eb8dd00727
Signed-off-by: Donghoon Yu <hoony.yu@samsung.com>
Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com>
Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com>
Acked-by: John Stultz <jstultz@google.com>
Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
Signed-off-by: Will McVicker <willmcvicker@google.com>
---
drivers/clocksource/exynos_mct.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index da09f467a6bb..96361d5dc57d 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -219,12 +219,18 @@ static struct clocksource mct_frc = {
.resume = exynos4_frc_resume,
};
+/*
+ * Since ARM devices do not have an architected timer, they need to continue
+ * using the MCT as the main clocksource for timekeeping, sched_clock, and the
+ * delay timer. For AARCH64 SoCs, the architected timer is the preferred
+ * clocksource due to it's superior performance.
+ */
+#if defined(CONFIG_ARM)
static u64 notrace exynos4_read_sched_clock(void)
{
return exynos4_read_count_32();
}
-#if defined(CONFIG_ARM)
static struct delay_timer exynos4_delay_timer;
static cycles_t exynos4_read_current_timer(void)
@@ -250,12 +256,13 @@ static int __init exynos4_clocksource_init(bool frc_shared)
exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer;
exynos4_delay_timer.freq = clk_rate;
register_current_timer_delay(&exynos4_delay_timer);
+
+ sched_clock_register(exynos4_read_sched_clock, 32, clk_rate);
#endif
if (clocksource_register_hz(&mct_frc, clk_rate))
panic("%s: can't register clocksource\n", mct_frc.name);
- sched_clock_register(exynos4_read_sched_clock, 32, clk_rate);
return 0;
}
--
2.50.0.rc2.761.g2dc52ea45b-goog
The following commit has been merged into the timers/clocksource branch of tip:
Commit-ID: 394b981382e6198363cf513f6eb6be4c55b22e44
Gitweb: https://git.kernel.org/tip/394b981382e6198363cf513f6eb6be4c55b22e44
Author: Will McVicker <willmcvicker@google.com>
AuthorDate: Fri, 20 Jun 2025 11:17:05 -07:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Tue, 15 Jul 2025 13:00:50 +02:00
clocksource/drivers/exynos_mct: Don't register as a sched_clock on arm64
The MCT register is unfortunately very slow to access, but importantly
does not halt in the c2 idle state. So for ARM64, we can improve
performance by not registering the MCT for sched_clock, allowing the
system to use the faster ARM architected timer for sched_clock instead.
The MCT is still registered as a clocksource, and a clockevent in order
to be a wakeup source for the arch_timer to exit the "c2" idle state.
Since ARM32 SoCs don't have an architected timer, the MCT must continue
to be used for sched_clock. Detailed discussion on this topic can be
found at [1].
[1] https://lore.kernel.org/linux-samsung-soc/1400188079-21832-1-git-send-email-chirantan@chromium.org/
[Original commit from https://android.googlesource.com/kernel/gs/+/630817f7080e92c5e0216095ff52f6eb8dd00727
Signed-off-by: Donghoon Yu <hoony.yu@samsung.com>
Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com>
Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com>
Acked-by: John Stultz <jstultz@google.com>
Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
Signed-off-by: Will McVicker <willmcvicker@google.com>
Link: https://lore.kernel.org/r/20250620181719.1399856-3-willmcvicker@google.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/clocksource/exynos_mct.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index da09f46..96361d5 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -219,12 +219,18 @@ static struct clocksource mct_frc = {
.resume = exynos4_frc_resume,
};
+/*
+ * Since ARM devices do not have an architected timer, they need to continue
+ * using the MCT as the main clocksource for timekeeping, sched_clock, and the
+ * delay timer. For AARCH64 SoCs, the architected timer is the preferred
+ * clocksource due to it's superior performance.
+ */
+#if defined(CONFIG_ARM)
static u64 notrace exynos4_read_sched_clock(void)
{
return exynos4_read_count_32();
}
-#if defined(CONFIG_ARM)
static struct delay_timer exynos4_delay_timer;
static cycles_t exynos4_read_current_timer(void)
@@ -250,12 +256,13 @@ static int __init exynos4_clocksource_init(bool frc_shared)
exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer;
exynos4_delay_timer.freq = clk_rate;
register_current_timer_delay(&exynos4_delay_timer);
+
+ sched_clock_register(exynos4_read_sched_clock, 32, clk_rate);
#endif
if (clocksource_register_hz(&mct_frc, clk_rate))
panic("%s: can't register clocksource\n", mct_frc.name);
- sched_clock_register(exynos4_read_sched_clock, 32, clk_rate);
return 0;
}
* tip-bot2 for Will McVicker <tip-bot2@linutronix.de> wrote: > The following commit has been merged into the timers/clocksource branch of tip: > > Commit-ID: 394b981382e6198363cf513f6eb6be4c55b22e44 > Gitweb: https://git.kernel.org/tip/394b981382e6198363cf513f6eb6be4c55b22e44 > Author: Will McVicker <willmcvicker@google.com> > AuthorDate: Fri, 20 Jun 2025 11:17:05 -07:00 > Committer: Daniel Lezcano <daniel.lezcano@linaro.org> > CommitterDate: Tue, 15 Jul 2025 13:00:50 +02:00 > > clocksource/drivers/exynos_mct: Don't register as a sched_clock on arm64 > > The MCT register is unfortunately very slow to access, but importantly > does not halt in the c2 idle state. So for ARM64, we can improve > performance by not registering the MCT for sched_clock, allowing the > system to use the faster ARM architected timer for sched_clock instead. > > The MCT is still registered as a clocksource, and a clockevent in order > to be a wakeup source for the arch_timer to exit the "c2" idle state. > > Since ARM32 SoCs don't have an architected timer, the MCT must continue > to be used for sched_clock. Detailed discussion on this topic can be > found at [1]. > > [1] https://lore.kernel.org/linux-samsung-soc/1400188079-21832-1-git-send-email-chirantan@chromium.org/ > > [Original commit from https://android.googlesource.com/kernel/gs/+/630817f7080e92c5e0216095ff52f6eb8dd00727 > > Signed-off-by: Donghoon Yu <hoony.yu@samsung.com> > Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com> > Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com> > Acked-by: John Stultz <jstultz@google.com> > Tested-by: Youngmin Nam <youngmin.nam@samsung.com> > Signed-off-by: Will McVicker <willmcvicker@google.com> > Link: https://lore.kernel.org/r/20250620181719.1399856-3-willmcvicker@google.com > Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> The whole SOB chain of this commit is messy and has several serious problems: 1) This commit has misattributed authorship: the first SOB is: Signed-off-by: Donghoon Yu <hoony.yu@samsung.com> but the Author field is not Donghoon Yu: Author: Will McVicker <willmcvicker@google.com> 2) The Reviewed-by tag is misapplied: > Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com> > Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com> When someone passes along a patch, it's implicit that they have reviewed it. 3) There's also a stray Tested-by tag by one of the SOB entries: > Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com> > Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com> > Tested-by: Youngmin Nam <youngmin.nam@samsung.com> When someone passes along a patch, it's implicit that they not only have reviewed the patch, but have also tested it to a certain extent ... 4) Why is the 'Link' tag just in the middle of the SOB chain, instead at the end of it? Presumably this is the proper SOB chain: > Author: Donghoon Yu <hoony.yu@samsung.com> > Signed-off-by: Donghoon Yu <hoony.yu@samsung.com> > Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com> > Signed-off-by: Will McVicker <willmcvicker@google.com> > Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> > Acked-by: John Stultz <jstultz@google.com> > Link: https://lore.kernel.org/r/20250620181719.1399856-3-willmcvicker@google.com Correct? Thanks, Ingo
On 24/07/2025 07:16, Ingo Molnar wrote: > > * tip-bot2 for Will McVicker <tip-bot2@linutronix.de> wrote: > >> The following commit has been merged into the timers/clocksource branch of tip: >> >> Commit-ID: 394b981382e6198363cf513f6eb6be4c55b22e44 >> Gitweb: https://git.kernel.org/tip/394b981382e6198363cf513f6eb6be4c55b22e44 >> Author: Will McVicker <willmcvicker@google.com> >> AuthorDate: Fri, 20 Jun 2025 11:17:05 -07:00 >> Committer: Daniel Lezcano <daniel.lezcano@linaro.org> >> CommitterDate: Tue, 15 Jul 2025 13:00:50 +02:00 >> >> clocksource/drivers/exynos_mct: Don't register as a sched_clock on arm64 >> >> The MCT register is unfortunately very slow to access, but importantly >> does not halt in the c2 idle state. So for ARM64, we can improve >> performance by not registering the MCT for sched_clock, allowing the >> system to use the faster ARM architected timer for sched_clock instead. >> >> The MCT is still registered as a clocksource, and a clockevent in order >> to be a wakeup source for the arch_timer to exit the "c2" idle state. >> >> Since ARM32 SoCs don't have an architected timer, the MCT must continue >> to be used for sched_clock. Detailed discussion on this topic can be >> found at [1]. >> >> [1] https://lore.kernel.org/linux-samsung-soc/1400188079-21832-1-git-send-email-chirantan@chromium.org/ >> >> [Original commit from https://android.googlesource.com/kernel/gs/+/630817f7080e92c5e0216095ff52f6eb8dd00727 >> >> Signed-off-by: Donghoon Yu <hoony.yu@samsung.com> >> Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com> >> Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com> >> Acked-by: John Stultz <jstultz@google.com> >> Tested-by: Youngmin Nam <youngmin.nam@samsung.com> >> Signed-off-by: Will McVicker <willmcvicker@google.com> >> Link: https://lore.kernel.org/r/20250620181719.1399856-3-willmcvicker@google.com >> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> > > The whole SOB chain of this commit is messy and has several serious > problems: > > 1) > > This commit has misattributed authorship: the first SOB is: > > Signed-off-by: Donghoon Yu <hoony.yu@samsung.com> > > but the Author field is not Donghoon Yu: > > Author: Will McVicker <willmcvicker@google.com> Yes, you are right. I should have pay more attention to author / sob, thanks for spotting it. > 2) > > The Reviewed-by tag is misapplied: > >> Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com> >> Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com> > > When someone passes along a patch, it's implicit that they have > reviewed it. Well my understanding of the SOB chain for these is the Signed-off-by from Youngmin is in the delivery path because it went first to the AOSP, then carried on to Linux by Will. Then Reviewed-by Youngmin letting us know the port from AOSP to Linux is ok. > 3) > > There's also a stray Tested-by tag by one of the SOB entries: > >> Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com> >> Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com> >> Tested-by: Youngmin Nam <youngmin.nam@samsung.com> > > When someone passes along a patch, it's implicit that they not only > have reviewed the patch, but have also tested it to a certain extent In this specific case where the original commit is from AOSP, this chain seems to make sense. Souns like: "I was in the original commit delivery path" "I reviewed this patch carried to Linux" "I tested it on Linux" > ... > > 4) > > Why is the 'Link' tag just in the middle of the SOB chain, instead at the end of it? I don't know. Link must be at the end It is stated somewhere in the documentation? I use git b4 -s <msg-id> and the tool adds the Link then my sign off. > Presumably this is the proper SOB chain: > >> Author: Donghoon Yu <hoony.yu@samsung.com> > >> Signed-off-by: Donghoon Yu <hoony.yu@samsung.com> >> Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com> >> Signed-off-by: Will McVicker <willmcvicker@google.com> >> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> >> Acked-by: John Stultz <jstultz@google.com> >> Link: https://lore.kernel.org/r/20250620181719.1399856-3-willmcvicker@google.com > > Correct? -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
* Daniel Lezcano <daniel.lezcano@linaro.org> wrote:
> On 24/07/2025 07:16, Ingo Molnar wrote:
> >
> > * tip-bot2 for Will McVicker <tip-bot2@linutronix.de> wrote:
> >
> > > The following commit has been merged into the timers/clocksource branch of tip:
> > >
> > > Commit-ID: 394b981382e6198363cf513f6eb6be4c55b22e44
> > > Gitweb: https://git.kernel.org/tip/394b981382e6198363cf513f6eb6be4c55b22e44
> > > Author: Will McVicker <willmcvicker@google.com>
> > > AuthorDate: Fri, 20 Jun 2025 11:17:05 -07:00
> > > Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
> > > CommitterDate: Tue, 15 Jul 2025 13:00:50 +02:00
> > >
> > > clocksource/drivers/exynos_mct: Don't register as a sched_clock on arm64
> > >
> > > The MCT register is unfortunately very slow to access, but importantly
> > > does not halt in the c2 idle state. So for ARM64, we can improve
> > > performance by not registering the MCT for sched_clock, allowing the
> > > system to use the faster ARM architected timer for sched_clock instead.
> > >
> > > The MCT is still registered as a clocksource, and a clockevent in order
> > > to be a wakeup source for the arch_timer to exit the "c2" idle state.
> > >
> > > Since ARM32 SoCs don't have an architected timer, the MCT must continue
> > > to be used for sched_clock. Detailed discussion on this topic can be
> > > found at [1].
> > >
> > > [1] https://lore.kernel.org/linux-samsung-soc/1400188079-21832-1-git-send-email-chirantan@chromium.org/
> > >
> > > [Original commit from https://android.googlesource.com/kernel/gs/+/630817f7080e92c5e0216095ff52f6eb8dd00727
> > >
> > > Signed-off-by: Donghoon Yu <hoony.yu@samsung.com>
> > > Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com>
> > > Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com>
> > > Acked-by: John Stultz <jstultz@google.com>
> > > Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
> > > Signed-off-by: Will McVicker <willmcvicker@google.com>
> > > Link: https://lore.kernel.org/r/20250620181719.1399856-3-willmcvicker@google.com
> > > Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> >
> > The whole SOB chain of this commit is messy and has several serious
> > problems:
> >
> > 1)
> >
> > This commit has misattributed authorship: the first SOB is:
> >
> > Signed-off-by: Donghoon Yu <hoony.yu@samsung.com>
> >
> > but the Author field is not Donghoon Yu:
> >
> > Author: Will McVicker <willmcvicker@google.com>
>
> Yes, you are right. I should have pay more attention to author / sob, thanks
> for spotting it.
>
> > 2)
> >
> > The Reviewed-by tag is misapplied:
> >
> > > Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com>
> > > Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com>
> >
> > When someone passes along a patch, it's implicit that they have
> > reviewed it.
>
> Well my understanding of the SOB chain for these is the Signed-off-by from
> Youngmin is in the delivery path because it went first to the AOSP, then
> carried on to Linux by Will. Then Reviewed-by Youngmin letting us know the
> port from AOSP to Linux is ok.
>
> > 3)
> >
> > There's also a stray Tested-by tag by one of the SOB entries:
> >
> > > Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com>
> > > Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com>
> > > Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
> >
> > When someone passes along a patch, it's implicit that they not only
> > have reviewed the patch, but have also tested it to a certain extent
>
> In this specific case where the original commit is from AOSP, this chain
> seems to make sense. Souns like:
>
> "I was in the original commit delivery path"
> "I reviewed this patch carried to Linux"
> "I tested it on Linux"
Yeah, so then this should be documented by adding a comment to the tag
itself:
Signed-off-by: Donghoon Yu <hoony.yu@samsung.com>
Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com>
Signed-off-by: Will McVicker <willmcvicker@google.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Tested-by: Youngmin Nam <youngmin.nam@samsung.com> # AOSP -> Linux port
Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com> # AOSP -> Linux port
Otherwise it's just confusing as to why there's duplicate SOB and
Reviewed-by entries.
But as long as the porting was basically just a cherry-pick, these
extra tags are probably superfluous. If there was a conflict resolved
by one of the maintainers along the SOB chain, that should be marked
explicitly, which I see was already done in some cases:
[ dlezcano : Fixed conflict with 20250614175556.922159-2-linux@roeck-us.net ]
> > ...
> >
> > 4)
> >
> > Why is the 'Link' tag just in the middle of the SOB chain, instead at the end of it?
>
> I don't know. Link must be at the end It is stated somewhere in the
> documentation?
>
> I use git b4 -s <msg-id> and the tool adds the Link then my sign off.
Yeah, so using tools and not looking at the end result will often just
create a random tag order that looks messy.
On preferred tag ordering, see:
Documentation/process/maintainer-tip.rst
Ordering of commit tags
^^^^^^^^^^^^^^^^^^^^^^^
...
'Link' is at the end of the list of tags.
There's some logic to the -tip tag ordering (more important tags go
before less important tags), but it's mostly just an arbitrary order
that we try to stick to within -tip.
> > Presumably this is the proper SOB chain:
> >
> > > Author: Donghoon Yu <hoony.yu@samsung.com>
> >
> > > Signed-off-by: Donghoon Yu <hoony.yu@samsung.com>
> > > Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com>
> > > Signed-off-by: Will McVicker <willmcvicker@google.com>
> > > Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> > > Acked-by: John Stultz <jstultz@google.com>
> > > Link: https://lore.kernel.org/r/20250620181719.1399856-3-willmcvicker@google.com
> >
> > Correct?
>
>
So I got no answer for this question, but I suppose my assumption is
correct - so I've rebased the tip:timers/clocksource commits to fix the
misattribution and a number of other problems, and also fixed various
typos, spelling mistakes and inconsistencies in the changelogs while at
it. Let me know if I got something wrong.
I've attached a delta-patch of the changelog changes below - note that
I skipped the commit IDs to make the diff easier to read.
Thanks,
Ingo
===================>
--- 2025-07-25 12:15:26.024284067 +0200
+++ 2025-07-25 12:15:18.761435799 +0200
@@ -10,6 +10,7 @@ Date: Tue Jul 15 14:18:33 2025 +0200
the module loading.
Fix this by adding the __init_or_module annotation for the functions:
+
- mct_init_dt()
- mct_init_spi()
- mct_init_dt()
@@ -17,9 +18,10 @@ Date: Tue Jul 15 14:18:33 2025 +0200
Compiled on ARM32 + MODULES=no, ARM64 + MODULES=yes, ARM64 +
MODULES=no
- Link: https://lore.kernel.org/r/20250715121834.2059191-1-daniel.lezcano@linaro.org
- Reviewed-by: Will McVicker <willmcvicker@google.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
+ Reviewed-by: Will McVicker <willmcvicker@google.com>
+ Link: https://lore.kernel.org/r/20250715121834.2059191-1-daniel.lezcano@linaro.org
Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Date: Wed Jun 11 13:07:58 2025 +0200
@@ -30,11 +32,12 @@ Date: Wed Jun 11 13:07:58 2025 +0200
with MT6765.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
- Acked-by: Rob Herring (Arm) <robh@kernel.org>
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
+ Acked-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250611110800.458164-2-angelogioacchino.delregno@collabora.com
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Author: Chen Ni <nichen@iscas.ac.cn>
Date: Tue Jun 3 14:04:50 2025 +0800
@@ -52,9 +55,10 @@ Date: Tue Jun 3 14:04:50 2025 +0800
Compile tested only.
Signed-off-by: Chen Ni <nichen@iscas.ac.cn>
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
Tested-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://lore.kernel.org/r/20250603060450.1310204-1-nichen@iscas.ac.cn
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Author: Frank Li <Frank.Li@nxp.com>
Date: Wed May 28 12:53:50 2025 -0400
@@ -67,9 +71,10 @@ Date: Wed May 28 12:53:50 2025 -0400
devices, which have existed for over 15 years.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250528165351.691848-1-Frank.Li@nxp.com
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Author: Arnd Bergmann <arnd@arndb.de>
Date: Fri Jun 20 13:19:35 2025 +0200
@@ -79,19 +84,21 @@ Date: Fri Jun 20 13:19:35 2025 +0200
The newly added function causes a build failure on 32-bit targets with
older compiler version such as gcc-10:
- arm-linux-gnueabi-ld: drivers/clocksource/timer-tegra186.o: in function `tegra186_wdt_get_timeleft':
- timer-tegra186.c:(.text+0x3c2): undefined reference to `__aeabi_uldivmod'
+ arm-linux-gnueabi-ld: drivers/clocksource/timer-tegra186.o: in function `tegra186_wdt_get_timeleft':
+ timer-tegra186.c:(.text+0x3c2): undefined reference to `__aeabi_uldivmod'
The calculation can trivially be changed to avoid the division entirely,
as USEC_PER_SEC is a multiple of 5. Change both such calculation for
consistency, even though gcc apparently managed to optimize the other one
properly already.
+ [ dlezcano : Fixed conflict with 20250614175556.922159-2-linux@roeck-us.net ]
+
Fixes: 28c842c8b0f5 ("clocksource/drivers/timer-tegra186: Add WDIOC_GETTIMELEFT support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Link: https://lore.kernel.org/r/20250620111939.3395525-1-arnd@kernel.org
- [dlezcano] : Fixed conflict with 20250614175556.922159-2-linux@roeck-us.net
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
+ Link: https://lore.kernel.org/r/20250620111939.3395525-1-arnd@kernel.org
Author: Guenter Roeck <linux@roeck-us.net>
Date: Sat Jun 14 10:55:56 2025 -0700
@@ -102,35 +109,37 @@ Date: Sat Jun 14 10:55:56 2025 -0700
remaining watchdog timeout. Simplify to use 32-bit operations,
and add comments explaining why there will be no overflow.
- Cc: Pohsun Su <pohsuns@nvidia.com>
- Cc: Robert Lin <robelin@nvidia.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
+ Cc: Pohsun Su <pohsuns@nvidia.com>
+ Cc: Robert Lin <robelin@nvidia.com>
Link: https://lore.kernel.org/r/20250614175556.922159-2-linux@roeck-us.net
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Author: Guenter Roeck <linux@roeck-us.net>
Date: Sat Jun 14 10:55:55 2025 -0700
clocksource/drivers/timer-tegra186: Avoid 64-bit divide operation
- Building the driver on xtensa fails with
+ Building the driver on xtensa fails with:
- tensa-linux-ld: drivers/clocksource/timer-tegra186.o:
+ tensa-linux-ld: drivers/clocksource/timer-tegra186.o:
in function `tegra186_timer_remove':
- timer-tegra186.c:(.text+0x350):
+ timer-tegra186.c:(.text+0x350):
undefined reference to `__udivdi3'
Avoid the problem by rearranging the offending code to avoid the 64-bit
divide operation.
Fixes: 28c842c8b0f5 ("clocksource/drivers/timer-tegra186: Add WDIOC_GETTIMELEFT support")
- Cc: Pohsun Su <pohsuns@nvidia.com>
- Cc: Robert Lin <robelin@nvidia.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
+ Cc: Pohsun Su <pohsuns@nvidia.com>
+ Cc: Robert Lin <robelin@nvidia.com>
Link: https://lore.kernel.org/r/20250614175556.922159-1-linux@roeck-us.net
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Author: Will McVicker <willmcvicker@google.com>
Date: Fri Jun 20 11:17:09 2025 -0700
@@ -143,11 +152,12 @@ Date: Fri Jun 20 11:17:09 2025 -0700
automatically. This allows platforms like Android to build the driver as
a module if desired.
- Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com>
- Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
Signed-off-by: Will McVicker <willmcvicker@google.com>
- Link: https://lore.kernel.org/r/20250620181719.1399856-7-willmcvicker@google.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
+ Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
+ Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com>
+ Link: https://lore.kernel.org/r/20250620181719.1399856-7-willmcvicker@google.com
Author: Donghoon Yu <hoony.yu@samsung.com>
Date: Fri Jun 20 11:17:08 2025 -0700
@@ -159,19 +169,21 @@ Date: Fri Jun 20 11:17:08 2025 -0700
tick timer. Once the MCT driver is loaded, it can be used as the wakeup
source for the arch_timer.
+ Original commit from:
+
+ https://android.googlesource.com/kernel/gs/+/8a52a8288ec7d88ff78f0b37480dbb0e9c65bbfd]
+
Signed-off-by: Donghoon Yu <hoony.yu@samsung.com>
Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com>
- [original commit from https://android.googlesource.com/kernel/gs/+/8a52a8288ec7d88ff78f0b37480dbb0e9c65bbfd]
- Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com>
- Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
Signed-off-by: Will McVicker <willmcvicker@google.com>
- Link: https://lore.kernel.org/r/20250620181719.1399856-6-willmcvicker@google.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
+ Link: https://lore.kernel.org/r/20250620181719.1399856-6-willmcvicker@google.com
Author: Will McVicker <willmcvicker@google.com>
Date: Fri Jun 20 11:17:07 2025 -0700
- clocksource/drivers/exynos_mct: Fix uninitialized irq name warning
+ clocksource/drivers/exynos_mct: Fix uninitialized IRQ name warning
The Exynos MCT driver doesn't set the clocksource name until the CPU
hotplug state is setup which happens after the IRQs are requested. This
@@ -217,32 +229,37 @@ Date: Fri Jun 20 11:17:07 2025 -0700
[ T430] load_module+0x1de0/0x2500
[ T430] init_module_from_file+0x8c/0xdc
+ Signed-off-by: Will McVicker <willmcvicker@google.com>
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
+ Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com>
- Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
- Signed-off-by: Will McVicker <willmcvicker@google.com>
Link: https://lore.kernel.org/r/20250620181719.1399856-5-willmcvicker@google.com
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Author: Hosung Kim <hosung0.kim@samsung.com>
Date: Fri Jun 20 11:17:06 2025 -0700
clocksource/drivers/exynos_mct: Set local timer interrupts as percpu
- To allow the CPU to handle it's own clock events, we need to set the
+ To allow the CPU to handle its own clock events, we need to set the
IRQF_PERCPU flag. This prevents the local timer interrupts from
migrating to other CPUs.
+ Original commit from:
+
+ https://android.googlesource.com/kernel/gs/+/03267fad19f093bac979ca78309483e9eb3a8d16
+
Signed-off-by: Hosung Kim <hosung0.kim@samsung.com>
- [Original commit from https://android.googlesource.com/kernel/gs/+/03267fad19f093bac979ca78309483e9eb3a8d16]
+ Signed-off-by: Will McVicker <willmcvicker@google.com>
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
+ Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com>
- Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
- Signed-off-by: Will McVicker <willmcvicker@google.com>
Link: https://lore.kernel.org/r/20250620181719.1399856-4-willmcvicker@google.com
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-Author: Will McVicker <willmcvicker@google.com>
+Author: Donghoon Yu <hoony.yu@samsung.com>
Date: Fri Jun 20 11:17:05 2025 -0700
clocksource/drivers/exynos_mct: Don't register as a sched_clock on arm64
@@ -257,42 +274,44 @@ Date: Fri Jun 20 11:17:05 2025 -0700
Since ARM32 SoCs don't have an architected timer, the MCT must continue
to be used for sched_clock. Detailed discussion on this topic can be
- found at [1].
+ found at:
+
+ https://lore.kernel.org/linux-samsung-soc/1400188079-21832-1-git-send-email-chirantan@chromium.org/
- [1] https://lore.kernel.org/linux-samsung-soc/1400188079-21832-1-git-send-email-chirantan@chromium.org/
+ Original commit from:
- [Original commit from https://android.googlesource.com/kernel/gs/+/630817f7080e92c5e0216095ff52f6eb8dd00727
+ https://android.googlesource.com/kernel/gs/+/630817f7080e92c5e0216095ff52f6eb8dd00727
Signed-off-by: Donghoon Yu <hoony.yu@samsung.com>
Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com>
- Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com>
- Acked-by: John Stultz <jstultz@google.com>
- Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
Signed-off-by: Will McVicker <willmcvicker@google.com>
- Link: https://lore.kernel.org/r/20250620181719.1399856-3-willmcvicker@google.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
+ Acked-by: John Stultz <jstultz@google.com>
+ Link: https://lore.kernel.org/r/20250620181719.1399856-3-willmcvicker@google.com
Author: Will McVicker <willmcvicker@google.com>
Date: Fri Jun 20 11:17:04 2025 -0700
- of/irq: Export of_irq_count for modules
+ of/irq: Export of_irq_count() for modules
- Need to export `of_irq_count` in preparation for modularizing the Exynos
+ Need to export of_irq_count() in preparation for modularizing the Exynos
MCT driver which uses this API for setting up the timer IRQs.
- Acked-by: Rob Herring (Arm) <robh@kernel.org>
- Acked-by: Arnd Bergmann <arnd@arndb.de>
+ Signed-off-by: Will McVicker <willmcvicker@google.com>
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
+ Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
Reviewed-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com>
- Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
- Signed-off-by: Will McVicker <willmcvicker@google.com>
+ Acked-by: Rob Herring (Arm) <robh@kernel.org>
+ Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20250620181719.1399856-2-willmcvicker@google.com
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Author: Ben Zong-You Xie <ben717@andestech.com>
Date: Fri Jul 11 21:30:21 2025 +0800
- dt-bindings: timer: add Andes machine timer
+ dt-bindings: timer: Add Andes machine timer
Add the DT binding documentation for Andes machine timer.
@@ -301,43 +320,47 @@ Date: Fri Jul 11 21:30:21 2025 +0800
the implementation of the machine timer, and it contains memory-mapped
registers (mtime and mtimecmp). This device supports up to 32 cores.
- Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
- Link: https://lore.kernel.org/r/20250711133025.2192404-6-ben717@andestech.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
+ Acked-by: Conor Dooley <conor.dooley@microchip.com>
+ Link: https://lore.kernel.org/r/20250711133025.2192404-6-ben717@andestech.com
Author: Frank Li <Frank.Li@nxp.com>
Date: Fri May 23 10:14:37 2025 -0400
- dt-bindings: timer: fsl,ftm-timer: use items for reg
+ dt-bindings: timer: fsl,ftm-timer: Use 'items' for 'reg'
The original txt binding doc is:
+
reg : Specifies base physical address and size of the register sets for
the clock event device and clock source device.
- And existed dts provide two reg MMIO spaces. So change to use items to
- descript reg property.
+ And existing DTS drivers provide two 'reg' MMIO spaces. So change
+ this driver to use 'items' to describe the 'reg' property.
- Update examples.
+ Update examples as well.
Fixes: 8fc30d8f8e86 ("dt-bindings: timer: fsl,ftm-timer: Convert to dtschema")
- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
- Link: https://lore.kernel.org/r/20250523141437.533643-1-Frank.Li@nxp.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
+ Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+ Link: https://lore.kernel.org/r/20250523141437.533643-1-Frank.Li@nxp.com
Author: Max Shevchenko <wctrl@proton.me>
Date: Wed Jul 2 13:50:40 2025 +0300
- dt-bindings: timer: mediatek: add MT6572
+ dt-bindings: timer: mediatek: Add MT6572
Add a compatible string for timer on the MT6572 SoC.
+ Signed-off-by: Max Shevchenko <wctrl@proton.me>
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
- Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-3-bde75b7ed445@proton.me
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Author: Rob Herring (Arm) <robh@kernel.org>
Date: Wed Jun 11 18:26:20 2025 -0500
@@ -349,30 +372,32 @@ Date: Wed Jun 11 18:26:20 2025 -0500
interrupts can also be anywhere from 1 to 8. The clock-names order was
reversed compared to what's used.
- Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
- Link: https://lore.kernel.org/r/20250611232621.1508116-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
+ Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
+ Link: https://lore.kernel.org/r/20250611232621.1508116-1-robh@kernel.org
Author: Daniel Lezcano <daniel.lezcano@linaro.org>
Date: Mon Jun 2 17:18:51 2025 +0200
- time/sched_clock: Export symbol for sched_clock register function
+ time/sched_clock: Export symbol for sched_clock_register() function
- The timer drivers could be converted into modules. The different
+ Timer drivers could be converted into modules. The different
functions to register the clocksource or the clockevent are already
- exporting their symbols for modules but the sched_clock_register()
+ exporting their symbols for modules, but the sched_clock_register()
function is missing.
- Export the symbols so the drivers using this function can be converted
+ Export the symbol so the drivers using this function can be converted
into modules.
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Will McVicker <willmcvicker@google.com>
- Acked-by: John Stultz <jstultz@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Carlos Llamas <cmllamas@google.com>
+ Acked-by: John Stultz <jstultz@google.com>
Link: https://lore.kernel.org/r/20250602151853.1942521-8-daniel.lezcano@linaro.org
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Author: Daniel Lezcano <daniel.lezcano@linaro.org>
Date: Mon Jun 2 17:18:50 2025 +0200
@@ -381,7 +406,7 @@ Date: Mon Jun 2 17:18:50 2025 +0200
The conversion to modules requires a correct handling of the module
refcount in order to prevent to unload it if it is in use. That is
- especially true with the clockevents where there is no function to
+ especially true with clockevents where there is no function to
unregister them.
The core time framework correctly handles the module refcount with the
@@ -391,9 +416,10 @@ Date: Mon Jun 2 17:18:50 2025 +0200
stupid things happening when the driver will be converted into a
module.
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Will McVicker <willmcvicker@google.com>
Link: https://lore.kernel.org/r/20250602151853.1942521-7-daniel.lezcano@linaro.org
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Author: Daniel Lezcano <daniel.lezcano@linaro.org>
Date: Mon Jun 2 17:18:49 2025 +0200
@@ -402,7 +428,7 @@ Date: Mon Jun 2 17:18:49 2025 +0200
The conversion to modules requires a correct handling of the module
refcount in order to prevent to unload it if it is in use. That is
- especially true with the clockevents where there is no function to
+ especially true with clockevents where there is no function to
unregister them.
The core time framework correctly handles the module refcount with the
@@ -412,9 +438,10 @@ Date: Mon Jun 2 17:18:49 2025 +0200
stupid things happening when the driver will be converted into a
module.
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Will McVicker <willmcvicker@google.com>
Link: https://lore.kernel.org/r/20250602151853.1942521-6-daniel.lezcano@linaro.org
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Author: Daniel Lezcano <daniel.lezcano@linaro.org>
Date: Mon Jun 2 17:18:48 2025 +0200
@@ -423,7 +450,7 @@ Date: Mon Jun 2 17:18:48 2025 +0200
The conversion to modules requires a correct handling of the module
refcount in order to prevent to unload it if it is in use. That is
- especially true with the clockevents where there is no function to
+ especially true with clockevents where there is no function to
unregister them.
The core time framework correctly handles the module refcount with the
@@ -433,9 +460,10 @@ Date: Mon Jun 2 17:18:48 2025 +0200
stupid things happening when the driver will be converted into a
module.
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Will McVicker <willmcvicker@google.com>
Link: https://lore.kernel.org/r/20250602151853.1942521-5-daniel.lezcano@linaro.org
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Author: Daniel Lezcano <daniel.lezcano@linaro.org>
Date: Mon Jun 2 17:18:47 2025 +0200
@@ -444,7 +472,7 @@ Date: Mon Jun 2 17:18:47 2025 +0200
The conversion to modules requires a correct handling of the module
refcount in order to prevent to unload it if it is in use. That is
- especially true with the clockevents where there is no function to
+ especially true with clockevents where there is no function to
unregister them.
The core time framework correctly handles the module refcount with the
@@ -454,10 +482,11 @@ Date: Mon Jun 2 17:18:47 2025 +0200
stupid things happening when the driver will be converted into a
module.
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Will McVicker <willmcvicker@google.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20250602151853.1942521-4-daniel.lezcano@linaro.org
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Author: Daniel Lezcano <daniel.lezcano@linaro.org>
Date: Mon Jun 2 17:18:46 2025 +0200
@@ -466,7 +495,7 @@ Date: Mon Jun 2 17:18:46 2025 +0200
The conversion to modules requires a correct handling of the module
refcount in order to prevent to unload it if it is in use. That is
- especially true with the clockevents where there is no function to
+ especially true with clockevents where there is no function to
unregister them.
The core time framework correctly handles the module refcount with the
@@ -476,9 +505,10 @@ Date: Mon Jun 2 17:18:46 2025 +0200
stupid things happening when the driver will be converted into a
module.
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Will McVicker <willmcvicker@google.com>
Link: https://lore.kernel.org/r/20250602151853.1942521-3-daniel.lezcano@linaro.org
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Author: Daniel Lezcano <daniel.lezcano@linaro.org>
Date: Mon Jun 2 17:18:45 2025 +0200
@@ -487,7 +517,7 @@ Date: Mon Jun 2 17:18:45 2025 +0200
The conversion to modules requires a correct handling of the module
refcount in order to prevent to unload it if it is in use. That is
- especially true with the clockevents where there is no function to
+ especially true with clockevents where there is no function to
unregister them.
The core time framework correctly handles the module refcount with the
@@ -497,6 +527,7 @@ Date: Mon Jun 2 17:18:45 2025 +0200
stupid things happening when the driver will be converted into a
module.
+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+ Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Will McVicker <willmcvicker@google.com>
Link: https://lore.kernel.org/r/20250602151853.1942521-2-daniel.lezcano@linaro.org
- Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
On 25/07/2025 12:34, Ingo Molnar wrote: > > * Daniel Lezcano <daniel.lezcano@linaro.org> wrote: [ ... ] >>> 3) >>> >>> There's also a stray Tested-by tag by one of the SOB entries: >>> >>>> Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com> >>>> Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com> >>>> Tested-by: Youngmin Nam <youngmin.nam@samsung.com> >>> >>> When someone passes along a patch, it's implicit that they not only >>> have reviewed the patch, but have also tested it to a certain extent >> >> In this specific case where the original commit is from AOSP, this chain >> seems to make sense. Souns like: >> >> "I was in the original commit delivery path" >> "I reviewed this patch carried to Linux" >> "I tested it on Linux" > > Yeah, so then this should be documented by adding a comment to the tag > itself: > > Signed-off-by: Donghoon Yu <hoony.yu@samsung.com> > Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com> > Signed-off-by: Will McVicker <willmcvicker@google.com> > Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> > Tested-by: Youngmin Nam <youngmin.nam@samsung.com> # AOSP -> Linux port > Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com> # AOSP -> Linux port > > Otherwise it's just confusing as to why there's duplicate SOB and > Reviewed-by entries. Yes, I agree it is more clear. > But as long as the porting was basically just a cherry-pick, these > extra tags are probably superfluous. If there was a conflict resolved > by one of the maintainers along the SOB chain, that should be marked > explicitly, which I see was already done in some cases: > > [ dlezcano : Fixed conflict with 20250614175556.922159-2-linux@roeck-us.net ] Ok, noted for the next time. >>> 4) >>> >>> Why is the 'Link' tag just in the middle of the SOB chain, instead at the end of it? >> >> I don't know. Link must be at the end It is stated somewhere in the >> documentation? >> >> I use git b4 -s <msg-id> and the tool adds the Link then my sign off. > > Yeah, so using tools and not looking at the end result will often just > create a random tag order that looks messy. > > On preferred tag ordering, see: > > Documentation/process/maintainer-tip.rst > > Ordering of commit tags > ^^^^^^^^^^^^^^^^^^^^^^^ > ... > > 'Link' is at the end of the list of tags. > > There's some logic to the -tip tag ordering (more important tags go > before less important tags), but it's mostly just an arbitrary order > that we try to stick to within -tip. Thanks for the pointer ! >>> Presumably this is the proper SOB chain: >>> >>>> Author: Donghoon Yu <hoony.yu@samsung.com> >>> >>>> Signed-off-by: Donghoon Yu <hoony.yu@samsung.com> >>>> Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com> >>>> Signed-off-by: Will McVicker <willmcvicker@google.com> >>>> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> >>>> Acked-by: John Stultz <jstultz@google.com> >>>> Link: https://lore.kernel.org/r/20250620181719.1399856-3-willmcvicker@google.com >>> >>> Correct? >> >> > > So I got no answer for this question, but I suppose my assumption is > correct - so I've rebased the tip:timers/clocksource commits to fix the > misattribution and a number of other problems, and also fixed various > typos, spelling mistakes and inconsistencies in the changelogs while at > it. Let me know if I got something wrong. If the rebase is possible, I suggest to take the opportunity to remove the following patches: commit 5d86e479193b - clocksource/drivers/exynos_mct: Add module support commit 7e477e9c4eb4 - clocksource/drivers/exynos_mct: Fix section mismatch from the module conversion Because of: [1] https://lore.kernel.org/all/20250725090349.87730-2-krzysztof.kozlowski@linaro.org/ [2] https://lore.kernel.org/all/bccb77b9-7cdc-4965-aa05-05836466f81f@app.fastmail.com/ > I've attached a delta-patch of the changelog changes below - note that > I skipped the commit IDs to make the diff easier to read. I have one question regarding the 'handler', when there is a message like: [ handler: I did some changes ] ... Signed-off-by: John Doe <handler@kernel.org> Does the 'handler' have to match the email name ? For example below, there is: [ dlezcano : Fixed conflict with 20250614175556.922159-2-linux@roeck-us.net ] Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Is this form ok, or should it be: [ daniel.lezcano: Fixed conflict with 20250614175556.922159-2-linux@roeck-us.net ] ? > ===================> > --- 2025-07-25 12:15:26.024284067 +0200 > +++ 2025-07-25 12:15:18.761435799 +0200 > @@ -10,6 +10,7 @@ Date: Tue Jul 15 14:18:33 2025 +0200 > the module loading. > > Fix this by adding the __init_or_module annotation for the functions: > + If my understanding of the documentation is correct, it seems to me the delta is ok. Until now, I was relying on the tool to put the different tags in the correct order, I thought it was in the arrival order. Thanks for fixing this. Is there an existing script checking the tags order is correct regarding the tip criteria ? Thanks -- Daniel -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
Hi Ingo, just a gentle ping for the question below about dropping the two patches. On 25/07/2025 15:15, Daniel Lezcano wrote: [ ... ] >> So I got no answer for this question, but I suppose my assumption is >> correct - so I've rebased the tip:timers/clocksource commits to fix the >> misattribution and a number of other problems, and also fixed various >> typos, spelling mistakes and inconsistencies in the changelogs while at >> it. Let me know if I got something wrong. > > If the rebase is possible, I suggest to take the opportunity to remove > the following patches: > > commit 5d86e479193b - clocksource/drivers/exynos_mct: Add module support > commit 7e477e9c4eb4 - clocksource/drivers/exynos_mct: Fix section > mismatch from the module conversion > > Because of: > > [1] https://lore.kernel.org/all/20250725090349.87730-2- > krzysztof.kozlowski@linaro.org/ > > [2] https://lore.kernel.org/all/bccb77b9-7cdc-4965- > aa05-05836466f81f@app.fastmail.com/ [ ... ] -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
On Tue, Jul 29 2025 at 09:58, Daniel Lezcano wrote:
> just a gentle ping for the question below about dropping the two patches.
>
> On 25/07/2025 15:15, Daniel Lezcano wrote:
>
> [ ... ]
>
>>> So I got no answer for this question, but I suppose my assumption is
>>> correct - so I've rebased the tip:timers/clocksource commits to fix the
>>> misattribution and a number of other problems, and also fixed various
>>> typos, spelling mistakes and inconsistencies in the changelogs while at
>>> it. Let me know if I got something wrong.
>>
>> If the rebase is possible, I suggest to take the opportunity to remove
>> the following patches:
>>
>> commit 5d86e479193b - clocksource/drivers/exynos_mct: Add module support
>> commit 7e477e9c4eb4 - clocksource/drivers/exynos_mct: Fix section
>> mismatch from the module conversion
>>
>> Because of:
>>
>> [1] https://lore.kernel.org/all/20250725090349.87730-2-
>> krzysztof.kozlowski@linaro.org/
>>
>> [2] https://lore.kernel.org/all/bccb77b9-7cdc-4965-
>> aa05-05836466f81f@app.fastmail.com/
Grrr.
I've already sent the pull request for the pile. Let me ask Linus not to
pull and I revert them on top.
Also please reset your clockevents branch so next does not have the
conflicting SHAs
Thanks,
tglx
On 29/07/2025 10:58, Thomas Gleixner wrote: > On Tue, Jul 29 2025 at 09:58, Daniel Lezcano wrote: >> just a gentle ping for the question below about dropping the two patches. >> >> On 25/07/2025 15:15, Daniel Lezcano wrote: >> >> [ ... ] >> >>>> So I got no answer for this question, but I suppose my assumption is >>>> correct - so I've rebased the tip:timers/clocksource commits to fix the >>>> misattribution and a number of other problems, and also fixed various >>>> typos, spelling mistakes and inconsistencies in the changelogs while at >>>> it. Let me know if I got something wrong. >>> >>> If the rebase is possible, I suggest to take the opportunity to remove >>> the following patches: >>> >>> commit 5d86e479193b - clocksource/drivers/exynos_mct: Add module support >>> commit 7e477e9c4eb4 - clocksource/drivers/exynos_mct: Fix section >>> mismatch from the module conversion >>> >>> Because of: >>> >>> [1] https://lore.kernel.org/all/20250725090349.87730-2- >>> krzysztof.kozlowski@linaro.org/ >>> >>> [2] https://lore.kernel.org/all/bccb77b9-7cdc-4965- >>> aa05-05836466f81f@app.fastmail.com/ > > Grrr. > > I've already sent the pull request for the pile. Let me ask Linus not to > pull and I revert them on top. > > Also please reset your clockevents branch so next does not have the > conflicting SHAs There is revert otherwise above [1] Branch reset to v6.16-rc5 -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
On Tue, Jul 29 2025 at 11:13, Daniel Lezcano wrote:
> On 29/07/2025 10:58, Thomas Gleixner wrote:
>> On Tue, Jul 29 2025 at 09:58, Daniel Lezcano wrote:
>>> just a gentle ping for the question below about dropping the two patches.
>>>
>>> On 25/07/2025 15:15, Daniel Lezcano wrote:
>>>
>>> [ ... ]
>>>
>>>>> So I got no answer for this question, but I suppose my assumption is
>>>>> correct - so I've rebased the tip:timers/clocksource commits to fix the
>>>>> misattribution and a number of other problems, and also fixed various
>>>>> typos, spelling mistakes and inconsistencies in the changelogs while at
>>>>> it. Let me know if I got something wrong.
>>>>
>>>> If the rebase is possible, I suggest to take the opportunity to remove
>>>> the following patches:
>>>>
>>>> commit 5d86e479193b - clocksource/drivers/exynos_mct: Add module support
>>>> commit 7e477e9c4eb4 - clocksource/drivers/exynos_mct: Fix section
>>>> mismatch from the module conversion
>>>>
>>>> Because of:
>>>>
>>>> [1] https://lore.kernel.org/all/20250725090349.87730-2-
>>>> krzysztof.kozlowski@linaro.org/
>>>>
>>>> [2] https://lore.kernel.org/all/bccb77b9-7cdc-4965-
>>>> aa05-05836466f81f@app.fastmail.com/
>>
>> Grrr.
>>
>> I've already sent the pull request for the pile. Let me ask Linus not to
>> pull and I revert them on top.
>>
>> Also please reset your clockevents branch so next does not have the
>> conflicting SHAs
>
> There is revert otherwise above [1]
It's incomplete :)
I just reverted all three exynos mct related changes on top of the
timers/clocksource branch and pushed the result out.
Thanks,
tglx
On 29/07/2025 18:13, Thomas Gleixner wrote: > On Tue, Jul 29 2025 at 11:13, Daniel Lezcano wrote: >> On 29/07/2025 10:58, Thomas Gleixner wrote: >>> On Tue, Jul 29 2025 at 09:58, Daniel Lezcano wrote: >>>> just a gentle ping for the question below about dropping the two patches. >>>> >>>> On 25/07/2025 15:15, Daniel Lezcano wrote: >>>> >>>> [ ... ] >>>> >>>>>> So I got no answer for this question, but I suppose my assumption is >>>>>> correct - so I've rebased the tip:timers/clocksource commits to fix the >>>>>> misattribution and a number of other problems, and also fixed various >>>>>> typos, spelling mistakes and inconsistencies in the changelogs while at >>>>>> it. Let me know if I got something wrong. >>>>> >>>>> If the rebase is possible, I suggest to take the opportunity to remove >>>>> the following patches: >>>>> >>>>> commit 5d86e479193b - clocksource/drivers/exynos_mct: Add module support >>>>> commit 7e477e9c4eb4 - clocksource/drivers/exynos_mct: Fix section >>>>> mismatch from the module conversion >>>>> >>>>> Because of: >>>>> >>>>> [1] https://lore.kernel.org/all/20250725090349.87730-2- >>>>> krzysztof.kozlowski@linaro.org/ >>>>> >>>>> [2] https://lore.kernel.org/all/bccb77b9-7cdc-4965- >>>>> aa05-05836466f81f@app.fastmail.com/ >>> >>> Grrr. >>> >>> I've already sent the pull request for the pile. Let me ask Linus not to >>> pull and I revert them on top. >>> >>> Also please reset your clockevents branch so next does not have the >>> conflicting SHAs >> >> There is revert otherwise above [1] > > It's incomplete :) > > I just reverted all three exynos mct related changes on top of the > timers/clocksource branch and pushed the result out. Thanks, sorry for the mess -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
On Tue, Jul 29 2025 at 10:58, Thomas Gleixner wrote:
> On Tue, Jul 29 2025 at 09:58, Daniel Lezcano wrote:
>> just a gentle ping for the question below about dropping the two patches.
>>
>> On 25/07/2025 15:15, Daniel Lezcano wrote:
>>
>> [ ... ]
>>
>>>> So I got no answer for this question, but I suppose my assumption is
>>>> correct - so I've rebased the tip:timers/clocksource commits to fix the
>>>> misattribution and a number of other problems, and also fixed various
>>>> typos, spelling mistakes and inconsistencies in the changelogs while at
>>>> it. Let me know if I got something wrong.
>>>
>>> If the rebase is possible, I suggest to take the opportunity to remove
>>> the following patches:
>>>
>>> commit 5d86e479193b - clocksource/drivers/exynos_mct: Add module support
>>> commit 7e477e9c4eb4 - clocksource/drivers/exynos_mct: Fix section
>>> mismatch from the module conversion
>>>
>>> Because of:
>>>
>>> [1] https://lore.kernel.org/all/20250725090349.87730-2-
>>> krzysztof.kozlowski@linaro.org/
>>>
>>> [2] https://lore.kernel.org/all/bccb77b9-7cdc-4965-
>>> aa05-05836466f81f@app.fastmail.com/
>
> Grrr.
>
> I've already sent the pull request for the pile. Let me ask Linus not to
> pull and I revert them on top.
That requires to revert 2798e90b4e09 ("arm64: exynos: Drop select CLKSRC_EXYNOS_MCT")
as well, no?
Thanks,
tglx
On 29/07/2025 11:03, Thomas Gleixner wrote:
> On Tue, Jul 29 2025 at 10:58, Thomas Gleixner wrote:
>
>> On Tue, Jul 29 2025 at 09:58, Daniel Lezcano wrote:
>>> just a gentle ping for the question below about dropping the two patches.
>>>
>>> On 25/07/2025 15:15, Daniel Lezcano wrote:
>>>
>>> [ ... ]
>>>
>>>>> So I got no answer for this question, but I suppose my assumption is
>>>>> correct - so I've rebased the tip:timers/clocksource commits to fix the
>>>>> misattribution and a number of other problems, and also fixed various
>>>>> typos, spelling mistakes and inconsistencies in the changelogs while at
>>>>> it. Let me know if I got something wrong.
>>>>
>>>> If the rebase is possible, I suggest to take the opportunity to remove
>>>> the following patches:
>>>>
>>>> commit 5d86e479193b - clocksource/drivers/exynos_mct: Add module support
>>>> commit 7e477e9c4eb4 - clocksource/drivers/exynos_mct: Fix section
>>>> mismatch from the module conversion
>>>>
>>>> Because of:
>>>>
>>>> [1] https://lore.kernel.org/all/20250725090349.87730-2-
>>>> krzysztof.kozlowski@linaro.org/
>>>>
>>>> [2] https://lore.kernel.org/all/bccb77b9-7cdc-4965-
>>>> aa05-05836466f81f@app.fastmail.com/
>>
>> Grrr.
>>
>> I've already sent the pull request for the pile. Let me ask Linus not to
>> pull and I revert them on top.
>
> That requires to revert 2798e90b4e09 ("arm64: exynos: Drop select CLKSRC_EXYNOS_MCT")
> as well, no?
Yes, indeed, I missed that.
Best regards,
Krzysztof
* Ingo Molnar <mingo@kernel.org> wrote: > The whole SOB chain of this commit is messy and has several serious > problems: Not just this commit, but most of the other commits in tip:timers/clocksource have various problems in their tag sections ... I only checked these more closely: 5d86e479193b clocksource/drivers/exynos_mct: Add module support 60618eec98f0 clocksource/drivers/exynos_mct: Fix uninitialized irq name warning 10934da577f6 clocksource/drivers/exynos_mct: Set local timer interrupts as percpu 394b981382e6 clocksource/drivers/exynos_mct: Don't register as a sched_clock on arm64 but all of them have various problems. And literally all 23 commits have the Link tag misplaced in the middle of the tag section. Thanks, Ingo
On Thu, Jul 24 2025 at 07:20, Ingo Molnar wrote: > * Ingo Molnar <mingo@kernel.org> wrote: > >> The whole SOB chain of this commit is messy and has several serious >> problems: > > Not just this commit, but most of the other commits in > tip:timers/clocksource have various problems in their tag sections ... > I only checked these more closely: > > 5d86e479193b clocksource/drivers/exynos_mct: Add module support > 60618eec98f0 clocksource/drivers/exynos_mct: Fix uninitialized irq name warning > 10934da577f6 clocksource/drivers/exynos_mct: Set local timer interrupts as percpu > 394b981382e6 clocksource/drivers/exynos_mct: Don't register as a sched_clock on arm64 > > but all of them have various problems. And literally all 23 commits > have the Link tag misplaced in the middle of the tag section. Duh. I did not check when pulling that lot.
The following commit has been merged into the timers/clocksource branch of tip:
Commit-ID: 57eac487dfd1d4342812a78138559f9f1d1d5c08
Gitweb: https://git.kernel.org/tip/57eac487dfd1d4342812a78138559f9f1d1d5c08
Author: Donghoon Yu <hoony.yu@samsung.com>
AuthorDate: Fri, 20 Jun 2025 11:17:05 -07:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Fri, 25 Jul 2025 12:05:32 +02:00
clocksource/drivers/exynos_mct: Don't register as a sched_clock on arm64
The MCT register is unfortunately very slow to access, but importantly
does not halt in the c2 idle state. So for ARM64, we can improve
performance by not registering the MCT for sched_clock, allowing the
system to use the faster ARM architected timer for sched_clock instead.
The MCT is still registered as a clocksource, and a clockevent in order
to be a wakeup source for the arch_timer to exit the "c2" idle state.
Since ARM32 SoCs don't have an architected timer, the MCT must continue
to be used for sched_clock. Detailed discussion on this topic can be
found at:
https://lore.kernel.org/linux-samsung-soc/1400188079-21832-1-git-send-email-chirantan@chromium.org/
Original commit from:
https://android.googlesource.com/kernel/gs/+/630817f7080e92c5e0216095ff52f6eb8dd00727
Signed-off-by: Donghoon Yu <hoony.yu@samsung.com>
Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com>
Signed-off-by: Will McVicker <willmcvicker@google.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Acked-by: John Stultz <jstultz@google.com>
Link: https://lore.kernel.org/r/20250620181719.1399856-3-willmcvicker@google.com
---
drivers/clocksource/exynos_mct.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index da09f46..96361d5 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -219,12 +219,18 @@ static struct clocksource mct_frc = {
.resume = exynos4_frc_resume,
};
+/*
+ * Since ARM devices do not have an architected timer, they need to continue
+ * using the MCT as the main clocksource for timekeeping, sched_clock, and the
+ * delay timer. For AARCH64 SoCs, the architected timer is the preferred
+ * clocksource due to it's superior performance.
+ */
+#if defined(CONFIG_ARM)
static u64 notrace exynos4_read_sched_clock(void)
{
return exynos4_read_count_32();
}
-#if defined(CONFIG_ARM)
static struct delay_timer exynos4_delay_timer;
static cycles_t exynos4_read_current_timer(void)
@@ -250,12 +256,13 @@ static int __init exynos4_clocksource_init(bool frc_shared)
exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer;
exynos4_delay_timer.freq = clk_rate;
register_current_timer_delay(&exynos4_delay_timer);
+
+ sched_clock_register(exynos4_read_sched_clock, 32, clk_rate);
#endif
if (clocksource_register_hz(&mct_frc, clk_rate))
panic("%s: can't register clocksource\n", mct_frc.name);
- sched_clock_register(exynos4_read_sched_clock, 32, clk_rate);
return 0;
}
© 2016 - 2026 Red Hat, Inc.